Patents by Inventor Vinod Tipparaju

Vinod Tipparaju has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12199759
    Abstract: Described herein is a graphics processor configured to perform asynchronous input dependency resolution among a group of interdependent workloads. The graphics processor can dynamically resolve input dependencies among the workloads according to a dependency relationship defined for the workloads. Dependency resolution be performed via a deferred submission mode which resolves input dependencies prior to thread dispatch to the processing resources or via immediate submission mode which resolves input dependencies at the processing resources.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: January 14, 2025
    Assignee: Intel Corporation
    Inventors: Michal Mrozek, Vinod Tipparaju
  • Publication number: 20220291955
    Abstract: Described herein is a graphics processor configured to perform asynchronous input dependency resolution among a group of interdependent workloads. The graphics processor can dynamically resolve input dependencies among the workloads according to a dependency relationship defined for the workloads. Dependency resolution be performed via a deferred submission mode which resolves input dependencies prior to thread dispatch to the processing resources or via immediate submission mode which resolves input dependencies at the processing resources.
    Type: Application
    Filed: March 7, 2022
    Publication date: September 15, 2022
    Applicant: Intel Corporation
    Inventors: Michal Mrozek, Vinod Tipparaju
  • Patent number: 10296378
    Abstract: A system and methods embodying some aspects of the present embodiments for efficient load balancing using predication flags are provided. The load balancing system includes a first processing unit, a second processing unit, and a shared queue. The first processing unit is in communication with a first queue. The second processing unit is in communication with a second queue. The first and second queues are each configured to hold a packet. The shared queue is configured to maintain a work assignment, wherein the work assignment is to be processed by either the first or second processing unit.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: May 21, 2019
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Vinod Tipparaju, Lee Howes, Thomas Scogland
  • Publication number: 20170139748
    Abstract: A system and methods embodying some aspects of the present embodiments for efficient load balancing using predication flags are provided. The load balancing system includes a first processing unit, a second processing unit, and a shared queue. The first processing unit is in communication with a first queue. The second processing unit is in communication with a second queue. The first and second queues are each configured to hold a packet. The shared queue is configured to maintain a work assignment, wherein the work assignment is to be processed by either the first or second processing unit.
    Type: Application
    Filed: January 31, 2017
    Publication date: May 18, 2017
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Vinod TIPPARAJU, Lee Howes, Thomas Scogland
  • Patent number: 9594595
    Abstract: A system and methods embodying some aspects of the present embodiments for efficient load balancing using predication flags are provided. The load balancing system includes a first processing unit, a second processing unit, and a shared queue. The first processing unit is in communication with a first queue. The second processing unit is in communication with a second queue. The first and second queues are each configured to hold a packet. The shared queue is configured to maintain a work assignment, wherein the work assignment is to be processed by either the first or second processing unit.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: March 14, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Vinod Tipparaju, Lee W. Howes, Thomas Scogland
  • Patent number: 9582402
    Abstract: The described embodiments include a networking subsystem in a second computing device that is configured to receive a task message from a first computing device. Based on the task message, the networking subsystem updates an entry in a task queue with task information from the task message. A processing subsystem in the second computing device subsequently retrieves the task information from the task queue and performs the corresponding task. In these embodiments, the networking subsystem processes the task message (e.g., stores the task information in the task queue) without causing the processing subsystem to perform operations for processing the task message.
    Type: Grant
    Filed: January 26, 2014
    Date of Patent: February 28, 2017
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Steven K. Reinhardt, Michael L. Chu, Vinod Tipparaju, Walter B. Benton
  • Publication number: 20160034304
    Abstract: A system and methods embodying some aspects of the present embodiments for maintaining compact in-order queues are provided. The queue management method includes requesting a work pointer from a primary queue, wherein the work pointer points to a work assignment comprising an indirect queue and a dependency list; responsive to the dependency list not being cleared, invalidating the work pointer in the primary queue and adding a new pointer to the end of the primary queue, the new pointer configured to point to the work assignment; and responsive to the dependency list being clear, removing the work pointer from the primary queue and performing work in the indirect queue.
    Type: Application
    Filed: July 29, 2014
    Publication date: February 4, 2016
    Inventors: Vinod TIPPARAJU, Lee W. HOWES, Thomas R.W. SCOGLAND
  • Publication number: 20140344830
    Abstract: A system and methods embodying some aspects of the present embodiments for efficient load balancing using predication flags are provided. The load balancing system includes a first processing unit, a second processing unit, and a shared queue. The first processing unit is in communication with a first queue. The second processing unit is in communication with a second queue. The first and second queues are each configured to hold a packet. The shared queue is configured to maintain a work assignment, wherein the work assignment is to be processed by either the first or second processing unit.
    Type: Application
    Filed: May 17, 2013
    Publication date: November 20, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Vinod TIPPARAJU, Lee W. Howes, Thomas Scogland
  • Publication number: 20140331230
    Abstract: The described embodiments include a networking subsystem in a second computing device that is configured to receive a task message from a first computing device. Based on the task message, the networking subsystem updates an entry in a task queue with task information from the task message. A processing subsystem in the second computing device subsequently retrieves the task information from the task queue and performs the corresponding task. In these embodiments, the networking subsystem processes the task message (e.g., stores the task information in the task queue) without causing the processing subsystem to perform operations for processing the task message.
    Type: Application
    Filed: January 26, 2014
    Publication date: November 6, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Steven K. Reinhardt, Michael L. Chu, Vinod Tipparaju, Walter B. Benton