Patents by Inventor Vinoth Sundaramoorthy

Vinoth Sundaramoorthy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456175
    Abstract: A method for forming a semiconductor device includes implanting first ions and second ions into a p-type silicon carbide layer from a first main side to form an implantation layer at the first main side. The implanting is performed by plasma immersion ion implantation in which the p-type silicon carbide layer is immersed in a plasma comprising the first ions and the second ions. The first ions can be ionized aluminum atoms and the second ions are different from the first ions.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: September 27, 2022
    Assignee: Hitachi Energy Switzerland AG
    Inventors: Giovanni Alfieri, Vinoth Sundaramoorthy
  • Patent number: 11211248
    Abstract: A method for p-type doping of a silicon carbide layer includes first implantation step of implanting aluminum dopants into a preselected region of the silicon carbide layer by ion implantation, an annealing step of annealing the silicon carbide layer after performing the first implantation step, a second implantation step of implanting beryllium dopants into the preselected region by ion implantation before the annealing step. A ratio of the total aluminum dose in the first implantation step to the total beryllium dose in the second implantation step is in a range between 0.1 and 10.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: December 28, 2021
    Assignee: ABB Power Grids Switzerland AG
    Inventors: Giovanni Alfieri, Vinoth Sundaramoorthy
  • Publication number: 20210242021
    Abstract: A method for forming a semiconductor device includes implanting first ions and second ions into a p-type silicon carbide layer from a first main side to form an implantation layer at the first main side. The implanting is performed by plasma immersion ion implantation in which the p-type silicon carbide layer is immersed in a plasma comprising the first ions and the second ions. The first ions can be ionized aluminum atoms and the second ions are different from the first ions.
    Type: Application
    Filed: February 3, 2021
    Publication date: August 5, 2021
    Inventors: Giovanni Alfieri, Vinoth Sundaramoorthy
  • Publication number: 20200411320
    Abstract: A method for p-type doping of a silicon carbide layer includes first implantation step of implanting aluminum dopants into a preselected region of the silicon carbide layer by ion implantation, an annealing step of annealing the silicon carbide layer after performing the first implantation step, a second implantation step of implanting beryllium dopants into the preselected region by ion implantation before the annealing step. A ratio of the total aluminum dose in the first implantation step to the total beryllium dose in the second implantation step is in a range between 0.1 and 10.
    Type: Application
    Filed: February 28, 2019
    Publication date: December 31, 2020
    Inventors: Giovanni Alfieri, Vinoth Sundaramoorthy
  • Patent number: 10121909
    Abstract: It is the object of the invention to provide a power semiconductor rectifier with a low on-state-voltage and high blocking capability. The object is attained by a power semiconductor rectifier comprising: a drift layer having a first conductivity type; and an electrode layer forming a Schottky contact with the drift layer, wherein the drift layer includes a base layer having a peak net doping concentration, below 1·1016 cm?3 and a barrier modulation layer which is in direct contact with the electrode layer to form at least a part of the Schottky contact, wherein a net doping concentration of the barrier modulation layer is in a range between 1·1016cm?3 and 1·1019 cm?3 and wherein the barrier modulation layer has a layer thickness in a direction vertical to the interface between the electrode layer and the barrier modulation, layer of at least 1 nm and less than 0.2 ?m.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: November 6, 2018
    Assignee: ABB Schweiz AG
    Inventors: Renato Minamisawa, Andrei Mihaila, Vinoth Sundaramoorthy
  • Patent number: 9683898
    Abstract: The present invention relates to a method for determining an actual junction temperature (Tj) and/or an actual collector current (IC) of an IGBT device, wherein the IGBT device has a main emitter (EM) and an auxiliary emitter (EA), comprising the steps of; measuring the characteristics of an emitter voltage drop (VEE?) as a difference between a main emitter voltage (VE) at the main emitter (EM) and an auxiliary emitter voltage (VE?) at the auxiliary emitter (EA) during a switching operation of the IGBT device; and determining the junction temperature and/or the collector current (IC) based on the characteristics of the emitter voltage drop (VEE?).
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: June 20, 2017
    Assignee: ABB Schweiz AG
    Inventors: Vinoth Sundaramoorthy, Enea Bianda, Richard Bloch, Iulian Nistor, Gerold Knapp
  • Publication number: 20160313191
    Abstract: The present invention relates to a method for determining an actual junction temperature (Tj) and/or an actual collector current (Ic) of an IGBT device, wherein the IGBT device has a main emitter (EM) and an auxiliary emitter (EA), comprising the steps of; measuring the characteristics of an emitter voltage drop (VEE?) as a difference between a main emitter voltage (VE) at the main emitter (EM) and an auxiliary emitter voltage (VE?) at the auxiliary emitter (EA) during a switching operation of the IGBT device; and determining the junction temperature and/or the collector current (IC) based on the characteristics of the emitter voltage drop (VEE?).
    Type: Application
    Filed: March 23, 2016
    Publication date: October 27, 2016
    Inventors: Vinoth Sundaramoorthy, Enea Bianda, Richard Bloch, Lulian Nistor, Gerold Knapp
  • Publication number: 20160268448
    Abstract: It is the object of the invention to provide a power semiconductor rectifier with a low on-state voltage and high blocking capability. The object is attained by a power semiconductor rectifier comprising: a drift layer having a first conductivity type; and an electrode layer forming a Schottky contact with the drift layer, wherein the drift layer includes a base layer having a peak net doping concentration below 1-1016 cm?3 and a barrier modulation layer which is in direct contact with the electrode layer to form at least a part of the Schottky contact, wherein a net doping concentration of the barrier modulation layer is in a range between 1-1016 cm?3 and 1-1019 cm?3, and wherein the barrier modulation layer has a layer thickness in a direction vertical to the interface between the electrode layer and the barrier modulation layer of at least 1 nm and less than 0.2 ?m.
    Type: Application
    Filed: March 10, 2016
    Publication date: September 15, 2016
    Inventors: Renato Minamisawa, Andrei Mihaila, Vinoth Sundaramoorthy
  • Patent number: 9039279
    Abstract: A system and method are provided for monitoring in real time the operating state of an IGBT device, to determine a junction temperature and/or the remaining lifetime of an IGBT device. The system includes a differential unit configured to receive a gate-emitter voltage characteristic of the IGBT device to be measured and to differentiate the gate-emitter voltage characteristic to obtain pulses correlating with edges formed by a Miller plateau phase during a switch-off phase of the IGBT device. The system also includes a timer unit configured to measure the time delay between the obtained pulses indicating the start and end of the Miller plateau phase during the switch-off phase of the IGBT device, and a junction temperature calculation unit configured to determine at least one of the junction temperature of the IGBT device and/or the remaining lifetime of the IGBT device based on the measured time delay.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: May 26, 2015
    Assignee: ABB RESEARCH LTD
    Inventors: Vinoth Sundaramoorthy, Alexander Heinemann, Enea Bianda, Franz Zurfluh, Gerold Knapp, Iulian Nistor, Richard Bloch