Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing and using PSMI using at-speed scan capture. For example, in one embodiment, such a system includes an input signal capture device to capture input signals input to a silicon processor under test; a scan capture device to capture a scan snapshot representing a known state of a plurality of digital elements integrated within the silicon processor under test, each having state data for the silicon processor under test; a scan read-out device to communicate the captured scan snapshot to a storage point physically external from the silicon processor under test; and a model of the silicon processor under test to replay a subset of a test sequence for the silicon processor under test based at least in part on the captured input signals and the captured scan snapshot.

Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing and using PSMI using at-speed scan capture. For example, in one embodiment, such a system includes an input signal capture device to capture input signals input to a silicon processor under test; a scan capture device to capture a scan snapshot representing a known state of a plurality of digital elements integrated within the silicon processor under test, each having state data for the silicon processor under test; a scan read-out device to communicate the captured scan snapshot to a storage point physically external from the silicon processor under test; and a model of the silicon processor under test to replay a subset of a test sequence for the silicon processor under test based at least in part on the captured input signals and the captured scan snapshot.