Patents by Inventor Vinu Yamunan

Vinu Yamunan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7445960
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: November 4, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Marvin W. Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip R. Coffman
  • Publication number: 20080050860
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Application
    Filed: June 14, 2007
    Publication date: February 28, 2008
    Inventors: Marvin Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip Coffman
  • Patent number: 7323362
    Abstract: A system (100) for manufacturing product, in which a first work station (101) is operable to perform a first manufacturing action on the product parts; this first station has a first entrance (101a) and a first exit 101b). A second work station (102) is operable to perform a second manufacturing action on the product parts; this second station has a second entrance (102a) and a second exit (102b). A transport line (103) between the first exit and the second entrance is operable to move the product parts under computer control. A chamber (104) encloses a portion of the line and is constructed so that the transport achieves a balanced throughput from the first station to the second station, while the product parts are exposed to computer-controlled environmental conditions (110) during transport through the chamber. The balanced throughput in the chamber is achieved by waiting lines for the product with computer-controlled monitors (105a) for product parts' positions and times in the chamber.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: January 29, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Charles A. Odegard, Vinu Yamunan, Tz-Cheng Chiu
  • Patent number: 7319275
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: January 15, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Marvin W. Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip R. Coffman
  • Patent number: 7276401
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: October 2, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Marvin W. Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip R. Coffman
  • Patent number: 7271494
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: September 18, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Marvin W. Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip R. Coffman
  • Publication number: 20070128881
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Application
    Filed: October 16, 2006
    Publication date: June 7, 2007
    Inventors: Marvin Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip Coffman
  • Publication number: 20060051889
    Abstract: Reinforced IC assemblies and methods useful for manufacturing the same are described. A reinforced IC assembly has a mounting surface for receiving a semiconductor die and a semiconductor die affixed to the mounting surface with an underfill material interposed between the mounting surface and the semiconductor die. Fillet material reinforces the junction of the die and the mounting surface. The underfill material and the fillet material have compatible chemistries for forming a strong bond. Preferably, a underfill material having a relatively low viscosity is used, and fillet material having a relatively high viscosity is used. Exemplary embodiments of the invention are described in which a base material is used as the basis for both the underfill material and the fillet material; the base material is modified with an additive to form the fillet material.
    Type: Application
    Filed: September 8, 2004
    Publication date: March 9, 2006
    Inventor: Vinu Yamunan
  • Publication number: 20060027907
    Abstract: A system (100) for manufacturing product, in which a first work station (101) is operable to perform a first manufacturing action on the product parts; this first station has a first entrance (101a) and a first exit 101b). A second work station (102) is operable to perform a second manufacturing action on the product parts; this second station has a second entrance (102a) and a second exit (102b). A transport line (103) between the first exit and the second entrance is operable to move the product parts under computer control. A chamber (104) encloses a portion of the line and is constructed so that the transport achieves a balanced throughput from the first station to the second station, while the product parts are exposed to computer-controlled environmental conditions (110) during transport through the chamber. The balanced throughput in the chamber is achieved by waiting lines for the product with computer-controlled monitors (105a) for product parts' positions and times in the chamber.
    Type: Application
    Filed: September 30, 2005
    Publication date: February 9, 2006
    Inventors: Charles Odegard, Vinu Yamunan, Tz-Cheng Chiu
  • Patent number: 6977429
    Abstract: A system (100) for manufacturing product, in which a first work station (101) is operable to perform a first manufacturing action on the product parts; this first station has a first entrance (101a) and a first exit 101b). A second work station (102) is operable to perform a second manufacturing action on the product parts; this second station has a second entrance (102a) and a second exit (102b). A transport line (103) between the first exit and the second entrance is operable to move the product parts under computer control. A chamber (104) encloses a portion of the line and is constructed so that the transport achieves a balanced throughput from the first station to the second station, while the product parts are exposed to computer-controlled environmental conditions (110) during transport through the chamber. The balanced throughput in the chamber is achieved by waiting lines for the product with computer-controlled monitors (105a) for product parts' positions and times in the chamber.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: December 20, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Charles A. Odegard, Vinu Yamunan, Tz-Cheng Chiu
  • Publication number: 20050212149
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Application
    Filed: May 2, 2005
    Publication date: September 29, 2005
    Inventors: Marvin Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip Coffman
  • Publication number: 20050161834
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Application
    Filed: February 1, 2005
    Publication date: July 28, 2005
    Inventors: Marvin Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip Coffman
  • Publication number: 20050151238
    Abstract: A semiconductor device (700) having a leadframe with a first plurality of segments (110) having a narrow end portion (111) in a first horizontal plane (211) and a wide end portion (112) in a second horizontal plane (212). The leadframe further includes a second plurality of segments (120) having a narrow center portion (121) in the first horizontal plane, at least one wide center portion (122) in the second horizontal plane, and narrow end portions (123) in a third horizontal plane (213), which is located between the first and second planes.
    Type: Application
    Filed: December 29, 2003
    Publication date: July 14, 2005
    Inventor: Vinu Yamunan
  • Patent number: 6917098
    Abstract: A semiconductor device (700) having a leadframe with a first plurality of segments (110) having a narrow end portion (111) in a first horizontal plane (211) and a wide end portion (112) in a second horizontal plane (212). The leadframe further includes a second plurality of segments (120) having a narrow center portion (121) in the first horizontal plane, at least one wide center portion (122) in the second horizontal plane, and narrow end portions (123) in a third horizontal plane (213), which is located between the first and second planes.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: July 12, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Vinu Yamunan
  • Publication number: 20050124090
    Abstract: A system (100) for manufacturing product, in which a first work station (101) is operable to perform a first manufacturing action on the product parts; this first station has a first entrance (101a) and a first exit 101b). A second work station (102) is operable to perform a second manufacturing action on the product parts; this second station has a second entrance (102a) and a second exit (102b). A transport line (103) between the first exit and the second entrance is operable to move the product parts under computer control. A chamber (104) encloses a portion of the line and is constructed so that the transport achieves a balanced throughput from the first station to the second station, while the product parts are exposed to computer-controlled environmental conditions (110) during transport through the chamber. The balanced throughput in the chamber is achieved by waiting lines for the product with computer-controlled monitors (105a) for product parts' positions and times in the chamber.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 9, 2005
    Inventors: Charles Odegard, Vinu Yamunan, Tz-Cheng Chiu
  • Patent number: 6869831
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: March 22, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Marvin W. Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard, Phillip R. Coffman
  • Publication number: 20030052414
    Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.
    Type: Application
    Filed: September 14, 2001
    Publication date: March 20, 2003
    Inventors: Marvin W. Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard