Patents by Inventor Vipin P. Madangarli

Vipin P. Madangarli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8112736
    Abstract: A method uses a differential voltage response to identify fabrication process defects that would result if an IC design is fabricated (without re-designing to correct such defects). The method uses two stacks, whose respective outputs may be compared by a comparator, and comparator's output used to determine defectivity. In some embodiments, each stack includes a first-type device (e.g. a p-channel device) and at least two second-type devices (e.g. n-channel devices). The first-type device is used as a current source or as a select switch (depending on the mode of operation of the differential voltage defectivity monitoring circuit). One second-type device may be used as a select switch and for back-bias control, while another second-type device may be used as a blocking switch and/or a select switch. The method may use an addressable array of multiple test structures that have digitally multiplexed control lines, in some embodiments.
    Type: Grant
    Filed: October 2, 2010
    Date of Patent: February 7, 2012
    Assignee: Synopsys, Inc.
    Inventors: John D. Garcia, II, Vipin P. Madangarli
  • Publication number: 20110047523
    Abstract: A method uses a differential voltage response to identify fabrication process defects that would result if an IC design is fabricated (without re-designing to correct such defects). The method uses two stacks, whose respective outputs may be compared by a comparator, and comparator's output used to determine defectivity. In some embodiments, each stack includes a first-type device (e.g. a p-channel device) and at least two second-type devices (e.g. n-channel devices). The first-type device is used as a current source or as a select switch (depending on the mode of operation of the differential voltage defectivity monitoring circuit). One second-type device may be used as a select switch and for back-bias control, while another second-type device may be used as a blocking switch and/or a select switch. The method may use an addressable array of multiple test structures that have digitally multiplexed control lines, in some embodiments.
    Type: Application
    Filed: October 2, 2010
    Publication date: February 24, 2011
    Inventors: John D. Garcia, II, Vipin P. Madangarli
  • Patent number: 7808265
    Abstract: A circuit uses a differential voltage response to identify fabrication process defects that would result if an IC design is fabricated (without re-designing to correct such defects). The circuit includes two stacks, whose respective outputs may be compared by a comparator, and comparator's output used to determine defectivity. In some embodiments, each stack includes a first-type device (e.g. a p-channel device) and at least two second-type devices (e.g. n-channel devices). The first-type device is used as a current source or as a select switch (depending on the mode of operation of the differential voltage defectivity monitoring circuit). One second-type device may be used as a select switch and for back-bias control, while another second-type device may be used as a blocking switch and/or a select switch. The circuit may be built into an addressable array of multiple test structures that have digitally multiplexed control lines, in some embodiments.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: October 5, 2010
    Assignee: SYNOPSYS, Inc.
    Inventors: John D. Garcia, II, Vipin P. Madangarli
  • Publication number: 20080099762
    Abstract: A circuit uses a differential voltage response to identify fabrication process defects that would result if an IC design is fabricated (without re-designing to correct such defects). The circuit includes two stacks, whose respective outputs may be compared by a comparator, and comparator's output used to determine defectivity. In some embodiments, each stack includes a first-type device (e.g. a p-channel device) and at least two second-type devices (e.g. n-channel devices). The first-type device is used as a current source or as a select switch (depending on the mode of operation of the differential voltage defectivity monitoring circuit). One second-type device may be used as a select switch and for back-bias control, while another second-type device may be used as a blocking switch and/or a select switch. The circuit may be built into an addressable array of multiple test structures that have digitally multiplexed control lines, in some embodiments.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 1, 2008
    Applicant: Synopsys, Inc.
    Inventors: John D. Garcia, Vipin P. Madangarli