Patents by Inventor Vipul Katyal

Vipul Katyal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12027198
    Abstract: Embodiments include a memory device with an improved circuit to mitigate degradation of memory devices due to aging. Memory device input/output pins include delay elements for adjusting the delay in each memory input/output signal path to synchronize the input/output signal paths with one another. Certain data patterns, including a long series of logic zero values or a long series of logic one values, can cause asymmetric degradation of transistors included in the delay elements. This asymmetric degradation can reduce the operating frequency of the memory device, leading to lower performance. The disclosed embodiments change the polarity of signals passing through the delay elements to mitigate the effects of asymmetric degradation resulting from these data patterns. As a result, the performance of memory devices is improved relative to prior approaches.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: July 2, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Ish Chadha, Virendra Kumar, Vipul Katyal, Abhijith Kashyap
  • Patent number: 11936379
    Abstract: Embodiments include a memory device with an improved calibration circuit. Memory device input/output pins include delay lines for adjusting the delay in each memory input/output signal path. The delay adjustment circuitry includes digital delay lines for adjusting this delay. Further, each digital delay line is calibrated via a digital delay line locked loop which enables adjustment of the delay through the digital delay line in fractions of a unit interval across variations due to differences in manufacturing process, operating voltage, and operating temperature. The disclosed techniques calibrate the digital delay lines by measuring both the high phase and the low phase of the clock signal. As a result, the disclosed techniques compensate for duty cycle distortion by combining the calibration results from both phases of the clock signal. The disclosed techniques thereby result in lower calibration error relative to approaches that measure only one phase of the clock signal.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: March 19, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Ish Chadha, Virendra Kumar, Abhijith Kashyap, Vipul Katyal, Hao-Yi Wei
  • Publication number: 20130054274
    Abstract: Demographic information can be manually input into fields of a user interface. The demographic information can be for a patient of an eye care provider. One or more likely eye care insurers of the patient can be automatically determined from the demographic information. The eye care insurers that are accepted and that the patient is covered under can be unknown initially. A set of insurer maintained data stores corresponding to the set of one or more likely eye care insurers of the patient can be automatically determined. The set of insurer maintained data stores can be automatically searched for insurance information specific to individuals matching the demographic information. Results of the searching can be provided via the user interface, which identifies at least one eye care insurer of the patient and which provides an insurance number specific to an insurance policy of the patient.
    Type: Application
    Filed: August 24, 2011
    Publication date: February 28, 2013
    Inventor: VIPUL KATYAL
  • Patent number: 8106707
    Abstract: Embodiments of the present invention include systems and methods for generating a curvature compensated bandgap voltage reference. In an embodiment, a curvature compensated bandgap reference voltage is achieved by injecting a temperature dependent current at different points in the bandgap reference voltage circuit. In an embodiment, the temperature dependent current is injected in the proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) current generation block of the bandgap circuit. Alternatively, or additionally, the temperature dependent current is injected at the output stage of the bandgap circuit. In an embodiment, the temperature dependent current is a linear piecewise continuous function of temperature. In another embodiment, the temperature dependent current has opposite dependence on temperature to that of the bandgap voltage reference before curvature compensation.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: January 31, 2012
    Assignee: Broadcom Corporation
    Inventors: Vipul Katyal, Mark Rutherford
  • Publication number: 20100301832
    Abstract: Embodiments of the present invention include systems and methods for generating a curvature compensated bandgap voltage reference. In an embodiment, a curvature compensated bandgap reference voltage is achieved by injecting a temperature dependent current at different points in the bandgap reference voltage circuit. In an embodiment, the temperature dependent current is injected in the proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) current generation block of the bandgap circuit. Alternatively, or additionally, the temperature dependent current is injected at the output stage of the bandgap circuit. In an embodiment, the temperature dependent current is a linear piecewise continuous function of temperature. In another embodiment, the temperature dependent current has opposite dependence on temperature to that of the bandgap voltage reference before curvature compensation.
    Type: Application
    Filed: July 7, 2009
    Publication date: December 2, 2010
    Applicant: Broadcom Corporation
    Inventors: Vipul KATYAL, Mark RUTHERFORD