Abstract: Systems which support an asymmetric link define rules and policies in each individual physical layer. An asymmetric link is a physical layer with a different number of transmit versus receive lanes. Asymmetric links enable physical layers to optimize performance, power, and system resources based on the required data bandwidth per direction across a link. Modern applications exhibit large demands for high memory bandwidth, i.e., more memory channels and larger bandwidth per channel. The utilization data, patterns) of link usage, and/or patterns) of lane usage may be gathered to exploit the facilities provided by asymmetric links. An engine includes AI-fueled analytics to monitor, orchestrate resources, and provide optimal routing, exploiting asymmetric links, lane polarity, and enqueue-dequeue in a computing ecosystem.

Abstract: Example implementations relate to method and system for storing and applying updates to a firmware at runtime of a processor-based system. The processor-based system includes a system management (SM) memory, a platform hardware, a main processor, the firmware, and a hotfix-framework. The hotfix-framework includes a hotfix dispatcher module and a service driver module having one or more boot time resources. The firmware and the hotfix-framework are pre-executed in the SM memory. The platform hardware stores a hotfix-firmware including updates to the firmware into a memory of the processor-based system, and generates an interrupt to direct the main processor into an SM mode and get the hotfix-framework notification about the hotfix-firmware. The hotfix dispatcher module loads the hotfix-firmware from the memory into the SM memory, and executes the hotfix-firmware by utilizing the one or more boot time resources to apply the updates to the firmware at runtime of the processor-based system.

Abstract: Systems which support an asymmetric link define rules and policies in each individual physical layer. An asymmetric link is a physical layer with a different number of transmit versus receive lanes. Asymmetric links enable physical layers to optimize performance, power, and system resources based on the required data bandwidth per direction across a link. Modern applications exhibit large demands for high memory bandwidth, i.e., more memory channels and larger bandwidth per channel. The utilization data, patterns) of link usage, and/or patterns) of lane usage may be gathered to exploit the facilities provided by asymmetric links. An engine includes AI-fueled analytics to monitor, orchestrate resources, and provide optimal routing, exploiting asymmetric links, lane polarity, and enqueue-dequeue in a computing ecosystem.

Abstract: Example implementations relate to method and system for storing and applying updates to a firmware at runtime of a processor-based system. The processor-based system includes a system management (SM) memory, a platform hardware, a main processor, the firmware, and a hotfix-framework. The hotfix-framework includes a hotfix dispatcher module and a service driver module having one or more boot time resources. The firmware and the hotfix-framework are pre-executed in the SM memory. The platform hardware stores a hotfix-firmware including updates to the firmware into a memory of the processor-based system, and generates an interrupt to direct the main processor into an SM mode and get the hotfix-framework notification about the hotfix-firmware. The hotfix dispatcher module loads the hotfix-firmware from the memory into the SM memory, and executes the hotfix-firmware by utilizing the one or more boot time resources to apply the updates to the firmware at runtime of the processor-based system.

Abstract: In one example in accordance with the present disclosure, a device comprising a host computing device further comprises a processor, a non-volatile dual inline memory module (NVDIMM) comprising metadata indicating system configuration information associated with the NVDIMM, and a basic input output system (BIOS) comprising system configuration information associated with the host computing device. The BIOS may: determine whether there is a mismatch between the system configuration information of the host computing device and the system configuration information indicated by the metadata.

Abstract: Examples disclosed herein relate to backing up persistent memory. There is at least one memory addressable by at least one processor. The persistent memory includes a persistent memory region with multiple portions. A secondary storage includes a first backup of the persistent memory region. Modifications to the persistent memory region are tracked. Updated portions associated with the modifications are written to the secondary storage.