Patents by Inventor Virgil Cotoco Ararao

Virgil Cotoco Ararao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210323816
    Abstract: In described examples, a first device on a first surface of a substrate is coupled to a structure arranged on a second surface of the substrate. In at least one example, a first conductor arranged on the first surface is coupled to circuitry of the first device. An elevated portion of the first conductor is supported by disposing an encapsulate and curing the encapsulate. The first conductor is severed by cutting the encapsulate and the first conductor. A second conductor is coupled to the first conductor. The second conductor is coupled to the structure arranged on the second surface of the substrate.
    Type: Application
    Filed: July 1, 2021
    Publication date: October 21, 2021
    Inventors: Virgil Cotoco Ararao, John Charles Emhke
  • Patent number: 11084717
    Abstract: In described examples, a first device on a first surface of a substrate is coupled to a structure arranged on a second surface of the substrate. In at least one example, a first conductor arranged on the first surface is coupled to circuitry of the first device. An elevated portion of the first conductor is supported by disposing an encapsulate and curing the encapsulate. The first conductor is severed by cutting the encapsulate and the first conductor. A second conductor is coupled to the first conductor. The second conductor is coupled to the structure arranged on the second surface of the substrate.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: August 10, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Virgil Cotoco Ararao, John Charles Ehmke
  • Patent number: 10693020
    Abstract: An optical detector device including: a glass substrate having conductive traces plated thereon; a semiconductor device having an optical detector exposed on a side facing the glass substrate, the semiconductor device further including a plurality of bond pads electrically coupled to a first subset of the conductive traces; a metallic seal structure bonding a side of the glass substrate having the conductive traces with the side of the semiconductor device facing the glass substrate; and a plurality of conductive structures outside of a perimeter of the semiconductor device, the plurality of conductive structures being electrically coupled to a second subset of the conductive traces.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: June 23, 2020
    Assignee: TT ELECTRONICS PLC
    Inventors: Virgil Cotoco Ararao, Brent Hans Larson
  • Publication number: 20190382262
    Abstract: In described examples, a first device on a first surface of a substrate is coupled to a structure arranged on a second surface of the substrate. In at least one example, a first conductor arranged on the first surface is coupled to circuitry of the first device. An elevated portion of the first conductor is supported by disposing an encapsulate and curing the encapsulate. The first conductor is severed by cutting the encapsulate and the first conductor. A second conductor is coupled to the first conductor. The second conductor is coupled to the structure arranged on the second surface of the substrate.
    Type: Application
    Filed: August 26, 2019
    Publication date: December 19, 2019
    Inventors: Virgil Cotoco Ararao, John Charles Ehmke
  • Publication number: 20190371944
    Abstract: An optical detector device including: a glass substrate having conductive traces plated thereon; a semiconductor device having an optical detector exposed on a side facing the glass substrate, the semiconductor device further including a plurality of bond pads electrically coupled to a first subset of the conductive traces; a metallic seal structure bonding a side of the glass substrate having the conductive traces with the side of the semiconductor device facing the glass substrate; and a plurality of conductive structures outside of a perimeter of the semiconductor device, the plurality of conductive structures being electrically coupled to a second subset of the conductive traces.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 5, 2019
    Inventors: Virgil Cotoco Ararao, Brent Hans Larson
  • Patent number: 10427932
    Abstract: In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: October 1, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: John Charles Ehmke, Virgil Cotoco Ararao
  • Patent number: 10392246
    Abstract: In described examples, a first device on a first surface of a substrate is coupled to a structure arranged on a second surface of the substrate. In at least one example, a first conductor arranged on the first surface is coupled to circuitry of the first device. An elevated portion of the first conductor is supported by disposing an encapsulate and curing the encapsulate. The first conductor is severed by cutting the encapsulate and the first conductor. A second conductor is coupled to the first conductor. The second conductor is coupled to the structure arranged on the second surface of the substrate.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: August 27, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Virgil Cotoco Ararao, John Charles Ehmke
  • Publication number: 20180186629
    Abstract: In described examples, a first device on a first surface of a substrate is coupled to a structure arranged on a second surface of the substrate. In at least one example, a first conductor arranged on the first surface is coupled to circuitry of the first device. An elevated portion of the first conductor is supported by disposing an encapsulate and curing the encapsulate. The first conductor is severed by cutting the encapsulate and the first conductor. A second conductor is coupled to the first conductor. The second conductor is coupled to the structure arranged on the second surface of the substrate.
    Type: Application
    Filed: February 15, 2017
    Publication date: July 5, 2018
    Inventors: Virgil Cotoco Ararao, John Charles Ehmke
  • Publication number: 20180148319
    Abstract: In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.
    Type: Application
    Filed: January 24, 2018
    Publication date: May 31, 2018
    Inventors: John Charles Ehmke, Virgil Cotoco Ararao
  • Patent number: 9890036
    Abstract: In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: February 13, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: John Charles Ehmke, Virgil Cotoco Ararao
  • Publication number: 20170152136
    Abstract: In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.
    Type: Application
    Filed: February 10, 2017
    Publication date: June 1, 2017
    Inventors: John Charles Ehmke, Virgil Cotoco Ararao
  • Publication number: 20170050844
    Abstract: A hermetic package comprising a substrate (110) having a surface with a MEMS structure (101) of a first height (101a), the substrate hermetically sealed to a cap (120) forming a cavity over the MEMS structure; the cap attached to the substrate surface by a vertical stack (130) of metal layers adhering to the substrate surface and to the cap, the stack having a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance (140); the stack having a bottom first metal seed film (131a) adhering to the substrate and a bottom second metal seed film (131b) adhering to the bottom first seed film, both seed films of a first width (131c) and a common sidewall (138); further a top first metal seed film (132a) adhering to the cap and a top second metal seed film (132b) adhering to the top first seed film, both seed films with a second width (132c) smaller than the first width and a common sidewall (139); the bottom and top metal seed films tied to a metal layer (135) including gold-
    Type: Application
    Filed: August 17, 2015
    Publication date: February 23, 2017
    Inventors: John Charles Ehmke, Virgil Cotoco Ararao
  • Patent number: 9567213
    Abstract: A hermetic package comprising a substrate (110) having a surface with a MEMS structure (101) of a first height (101a), the substrate hermetically sealed to a cap (120) forming a cavity over the MEMS structure; the cap attached to the substrate surface by a vertical stack (130) of metal layers adhering to the substrate surface and to the cap, the stack having a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance (140); the stack having a bottom first metal seed film (131a) adhering to the substrate and a bottom second metal seed film (131b) adhering to the bottom first seed film, both seed films of a first width (131c) and a common sidewall (138); further a top first metal seed film (132a) adhering to the cap and a top second metal seed film (132b) adhering to the top first seed film, both seed films with a second width (132c) smaller than the first width and a common sidewall (139); the bottom and top metal seed films tied to a metal layer (135) including gold-
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: February 14, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: John Charles Ehmke, Virgil Cotoco Ararao
  • Patent number: 8207598
    Abstract: A semiconductor heat spreader from a unitary metallic plate is provided. The unitary metallic plate is formed into a panel, channel walls, at least two feet, and at least one external reversing bend. The channel walls depend from the panel to define a channel between the channel walls and the panel for receiving a semiconductor therein. The feet extend from respective channel walls for attachment to a substrate.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: June 26, 2012
    Assignee: ST Assembly Test Services Ltd.
    Inventors: Virgil Cotoco Ararao, Il Kwon Shim, Seng Guan Chow, Sheila Marie L. Alvarez
  • Patent number: 7863730
    Abstract: A method for forming a heat spreader, and the heat spreader formed thereby, are disclosed. An array heat spreader having a plurality of connected heat spreader panels is formed. Slots are formed in opposing sides of the heat spreader panels. Legs are formed on and extending downwardly from each of the heat spreader panels in at least an opposing pair of the slots on the heat spreader panels. The legs are integral with the respective heat spreader panels from which they depend.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: January 4, 2011
    Assignee: ST Assembly Test Services Ltd.
    Inventors: Il Kwon Shim, Kambhampati Ramakrishna, Diane Sahakian, Seng Guan Chow, Dario S. Filoteo, Jr., Virgil Cotoco Ararao
  • Patent number: 7786593
    Abstract: An integrated circuit die is provided having a body portion having a singulation side and a pedestal portion extending from the body portion and having a singulation side coplanar with the singulation side of the body portion.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: August 31, 2010
    Assignee: ST Assembly Test Services Ltd.
    Inventors: Virgil Cotoco Ararao, Il Kwon Shim, Seng Guan Chow
  • Publication number: 20090273062
    Abstract: A semiconductor heat spreader from a unitary metallic plate is provided. The unitary metallic plate is formed into a panel, channel walls, at least two feet, and at least one external reversing bend. The channel walls depend from the panel to define a channel between the channel walls and the panel for receiving a semiconductor therein. The feet extend from respective channel walls for attachment to a substrate.
    Type: Application
    Filed: July 6, 2009
    Publication date: November 5, 2009
    Inventors: Virgil Cotoco Ararao, Il Kwon Shim, Seng Guan Chow, Sheila Marie L. Alvarez
  • Patent number: 7575956
    Abstract: A method for fabricating a semiconductor heat spreader from a unitary metallic plate is provided. The unitary metallic plate is formed into a panel, channel walls, at least two feet, and at least one external reversing bend. The channel walls depend from the panel to define a channel between the channel walls and the panel for receiving a semiconductor therein. The feet extend from respective channel walls for attachment to a substrate.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: August 18, 2009
    Assignee: ST Assembly Test Services Ltd.
    Inventors: Virgil Cotoco Ararao, Il Kwon Shim, Seng Guan Chow, Sheila Marie L. Alvarez
  • Patent number: 7381593
    Abstract: A method and apparatus for stacked die packaging provide a leadframe configured for supporting a lower semiconductor die. At least one pillar is formed on the leadframe for supporting an upper semiconductor die. The pillar is formed integrally with and of the same material as the leadframe, and is sized to have a predetermined height that is higher than the height of such a lower semiconductor die plus the height of bonding wires for such a lower semiconductor die plus a predetermined spacing between such bonding wires and the bottom of an upper semiconductor die to be supported on the at least one pillar.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: June 3, 2008
    Assignee: ST Assembly Test Services Ltd.
    Inventors: Virgil Cotoco Ararao, Harvey Kong
  • Patent number: 7327025
    Abstract: An electronic device having a substrate carrier is provided. A semiconductor connected to the substrate carrier. A heat spreader having upper and lower surfaces and legs recessed below the lower surface is connected to the substrate carrier. The Z-dimension between the heat spreader and the substrate carrier is maintained over substantially the entire area of the substrate carrier.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: February 5, 2008
    Assignee: St Assembly Test Services Ltd.
    Inventors: Il Kwon Shim, Sheila Marie L. Alvarez, Virgil Cotoco Ararao