Patents by Inventor Virgil D. Gligor

Virgil D. Gligor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220108006
    Abstract: A method and apparatus for establishing a software root of trust (RoT) ensures that the state of an untrusted computer system contains all and only content chosen by an external verifier and the system code begins execution in that state, or that the verifier discovers the existence of unaccounted for content. The method enables program booting into computer system states that are free of persistent malware such that an adversary cannot retain undetected control of an untrusted system.
    Type: Application
    Filed: January 24, 2020
    Publication date: April 7, 2022
    Inventors: Virgil D. GLIGOR, Shan Leung WOO
  • Patent number: 11200350
    Abstract: This invention provides a method for providing trusted display to security sensitive applications on untrusted computing platforms. This invention has a minimal trusted code base and maintains full compatibility with the computing platforms, including their software and hardware. The core of the invention is a GPU separation kernel that (1) defines different types of GPU objects, (2) mediates access to security-sensitive GPU objects, and (3) emulates accesses to security-sensitive GPU objects whenever required by computing platform compatibility.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: December 14, 2021
    Assignee: CARNEGIE MELLON UNIVERSITY
    Inventors: Virgil D. Gligor, Zongwei Zhou, Miao Yu
  • Publication number: 20200356703
    Abstract: This invention provides a method for providing trusted display to security sensitive applications on untrusted computing platforms. This invention has a minimal trusted code base and maintains full compatibility with the computing platforms, including their software and hardware. The core of the invention is a GPU separation kernel that (1) defines different types of GPU objects, (2) mediates access to security-sensitive GPU objects, and (3) emulates accesses to security-sensitive GPU objects whenever required by computing platform compatibility.
    Type: Application
    Filed: July 23, 2020
    Publication date: November 12, 2020
    Inventors: Virgil D. Gligor, Zongwei Zhou, Miao Yu
  • Patent number: 10769312
    Abstract: This invention provides a method for providing trusted display to security sensitive applications on untrusted computing platforms. This invention has a minimal trusted code base and maintains full compatibility with the computing platforms, including their software and hardware. The core of our invention is a GPU separation kernel that (1) defines different types of GPU objects, (2) mediates access to security-sensitive GPU objects, and (3) emulates accesses to security-sensitive GPU objects whenever required by computing platform compatibility.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: September 8, 2020
    Assignee: CARNEGIE MELLON UNIVERSITY
    Inventors: Virgil D. Gligor, Zongwei Zhou, Miao Yu
  • Publication number: 20190116159
    Abstract: A method of transmitting data over a computer network includes, at an originating terminal connected to the computer network, receiving a stream of data and inserting a first level packet payload containing an at least one dummy data. The method includes, identifying a network destination address for the stream of data. Further, the method includes, forming a first level packet including the first level packet payload and a first level header containing data representing the network destination address. The method further includes, encrypting at least a portion of the first level packet to form a second level packet payload. The method further includes, forming a second level packet including the second level packet payload and a second layer header containing a router address of an intermediate router connecting the originating terminal to the network destination address. The method further includes, sending the second level packet to the intermediate router at the router address.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 18, 2019
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor
  • Patent number: 10235515
    Abstract: A computing platform for on-demand I/O channels, which enable secure application to dynamically connect to diverse peripheral devices of untrusted commodity OSes.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: March 19, 2019
    Assignee: CARNEGIE MELLON UNIVERSITY
    Inventors: Virgil D Gligor, Zongwei Zhou, Miao Yu
  • Publication number: 20190012489
    Abstract: This invention provides a method for providing trusted display to security sensitive applications on untrusted computing platforms. This invention has a minimal trusted code base and maintains full compatibility with the computing platforms, including their software and hardware. The core of our invention is a GPU separation kernel that (1) defines different types of GPU objects, (2) mediates access to security-sensitive GPU objects, and (3) emulates accesses to security-sensitive GPU objects whenever required by computing platform compatibility.
    Type: Application
    Filed: October 6, 2016
    Publication date: January 10, 2019
    Applicant: CARNEGIE MELLON UNIVERSITY
    Inventors: Virgil D. Gligor, Zongwei Zhou, Miao Yu
  • Publication number: 20180115529
    Abstract: A method of transmitting data over a computer network includes, at an originating terminal connected to the computer network, receiving a stream of data and inserting a first level packet payload containing an at least one dummy data. The method includes, identifying a network destination address for the stream of data. Further, the method includes, forming a first level packet including the first level packet payload and a first level header containing data representing the network destination address. The method further includes, encrypting at least a portion of the first level packet to form a second level packet payload. The method further includes, forming a second level packet including the second level packet payload and a second layer header containing a router address of an intermediate router connecting the originating terminal to the network destination address. The method further includes, sending the second level packet to the intermediate router at the router address.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 26, 2018
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor
  • Publication number: 20170177854
    Abstract: A computing platform for on-demand I/O channels, which enable secure application to dynamically connect to diverse peripheral devices of untrusted commodity OSes
    Type: Application
    Filed: May 15, 2015
    Publication date: June 22, 2017
    Inventors: Virgil D Gligor, Zongwei Zhou, Miao Yu
  • Patent number: 9479426
    Abstract: A plurality of computer nodes communicates using seemingly random IP source and destination addresses and (optionally) a seemingly random discriminator field. Data packets matching criteria defined by a moving window of valid addresses are accepted for further processing, while those that do not meet the criteria are rejected. In addition to “hopping” of IP addresses and discriminator fields, hardware addresses such as Media Access Control addresses can be hopped. The hopped addresses are generated by random number generators having non-repeating sequence lengths that are easily determined a-priori, which can quickly jump ahead in sequence by an arbitrary number of random steps and which have the property that future random numbers are difficult to guess without knowing the random number generator's parameters. Synchronization techniques can be used to re-establish synchronization between sending and receiving nodes.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: October 25, 2016
    Assignee: VIRNETZ, INC.
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor, Douglas Charles Schmidt
  • Patent number: 8874771
    Abstract: A plurality of computer nodes communicates using seemingly random IP source and destination addresses and (optionally) a seemingly random discriminator field. Data packets matching criteria defined by a moving window of valid addresses are accepted for further processing, while those that do not meet the criteria are rejected. In addition to “hopping” of IP addresses and discriminator fields, hardware addresses such as Media Access Control addresses can be hopped. The hopped addresses are generated by random number generators having non-repeating sequence lengths that are easily determined a-priori, which can quickly jump ahead in sequence by an arbitrary number of random steps and which have the property that future random numbers are difficult to guess without knowing the random number generator's parameters. Synchronization techniques can be used to re-establish synchronization between sending and receiving nodes.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: October 28, 2014
    Assignee: VirnetX, Inc.
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor
  • Patent number: 8832778
    Abstract: An apparatus and method for establishing a trusted path between a user interface and a trusted executable, wherein the trusted path includes a hypervisor and a driver shim. The method includes measuring an identity of the hypervisor; comparing the measurement of the identity of the hypervisor with a policy for the hypervisor; measuring an identity of the driver shim; comparing the measurement of the identity of the driver shim with a policy for the driver shim; measuring an identity of the user interface; comparing the measurement of the identity of the user interface with a policy for the user interface; and providing a human-perceptible indication of whether the identity of the hypervisor, the identity of the driver shim, and the identity of the user interface correspond with the policy for the hypervisor, the policy for the driver shim, and the policy for the user interface, respectively.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: September 9, 2014
    Assignee: Carnegie Mellon University
    Inventors: Jonathan M. McCune, Adrian M. Perrig, Anupam Datta, Virgil D. Gligor, Ning Qu
  • Publication number: 20130219174
    Abstract: A plurality of computer nodes communicates using seemingly random IP source and destination addresses and (optionally) a seemingly random discriminator field. Data packets matching criteria defined by a moving window of valid addresses are accepted for further processing, while those that do not meet the criteria are rejected. In addition to “hopping” of IP addresses and discriminator fields, hardware addresses such as Media Access Control addresses can be hopped. The hopped addresses are generated by random number generators having non-repeating sequence lengths that are easily determined a-priori, which can quickly jump ahead in sequence by an arbitrary number of random steps and which have the property that future random numbers are difficult to guess without knowing the random number generator's parameters. Synchronization techniques can be used to re-establish synchronization between sending and receiving nodes.
    Type: Application
    Filed: September 14, 2012
    Publication date: August 22, 2013
    Applicant: Virnetx, INC.
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor, Douglas Charles Schmidt
  • Patent number: 8461963
    Abstract: An access authorization method and apparatus for a wireless sensor network comprises at least a base station and a wireless sensor network formed by a plurality of sensor nodes. After having obtained an access authorization of a user, the at least a base station issues a request message to a target sensor node in the wireless sensor network. The target sensor node requests at least a controlling node in the wireless sensor network for sensing data sensed by the at least a controlling node, and checks if the sensing data meets the requirements of the access authorization of the user. Whether the target sensor node responds with the required multimedia or not is based on the checking result.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: June 11, 2013
    Assignees: Industrial Technology Research Institute, Carnegie Mellon University
    Inventors: Lee-Chun Ko, Virgil D. Gligor, Hayan Lee
  • Publication number: 20130091354
    Abstract: A plurality of computer nodes communicates using seemingly random IP source and destination addresses and (optionally) a seemingly random discriminator field. Data packets matching criteria defined by a moving window of valid addresses are accepted for further processing, while those that do not meet the criteria are rejected. In addition to “hopping” of IP addresses and discriminator fields, hardware addresses such as Media Access Control addresses can be hopped. The hopped addresses are generated by random number generators having non-repeating sequence lengths that are easily determined a-priori, which can quickly jump ahead in sequence by an arbitrary number of random steps and which have the property that future random numbers are difficult to guess without knowing the random number generator's parameters. Synchronization techniques can be used to re-establish synchronization between sending and receiving nodes.
    Type: Application
    Filed: May 18, 2012
    Publication date: April 11, 2013
    Applicant: VIRNETX, INC.
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor, Douglas Charles Schmidt
  • Publication number: 20130067222
    Abstract: A plurality of computer nodes communicates using seemingly random IP source and destination addresses and (optionally) a seemingly random discriminator field. Data packets matching criteria defined by a moving window of valid addresses are accepted for further processing, while those that do not meet the criteria are rejected. In addition to “hopping” of IP addresses and discriminator fields, hardware addresses such as Media Access Control addresses can be hopped. The hopped addresses are generated by random number generators having non-repeating sequence lengths that are easily determined a-priori, which can quickly jump ahead in sequence by an arbitrary number of random steps and which have the property that future random numbers are difficult to guess without knowing the random number generator's parameters. Synchronization techniques can be used to re-establish synchronization between sending and receiving nodes.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 14, 2013
    Applicant: VIRNETX, INC.
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor, Douglas Charles Schmidt
  • Publication number: 20120198514
    Abstract: An apparatus and method for establishing a trusted path between a user interface and a trusted executable, wherein the trusted path includes a hypervisor and a driver shim. The method includes measuring an identity of the hypervisor; comparing the measurement of the identity of the hypervisor with a policy for the hypervisor; measuring an identity of the driver shim; comparing the measurement of the identity of the driver shim with a policy for the driver shim; measuring an identity of the user interface; comparing the measurement of the identity of the user interface with a policy for the user interface; and providing a human-perceptible indication of whether the identity of the hypervisor, the identity of the driver shim, and the identity of the user interface correspond with the policy for the hypervisor, the policy for the driver shim, and the policy for the user interface, respectively.
    Type: Application
    Filed: June 29, 2010
    Publication date: August 2, 2012
    Applicant: CARNEGIE MELLON UNIVERSITY
    Inventors: Jonathan M. McCune, Adrian M. Perrig, Anupam Datta, Virgil D. Gligor, Ning Qu
  • Publication number: 20110307693
    Abstract: A plurality of computer nodes communicates using seemingly random IP source and destination addresses and (optionally) a seemingly random discriminator field. Data packets matching criteria defined by a moving window of valid addresses are accepted for further processing, while those that do not meet the criteria are rejected. In addition to “hopping” of IP addresses and discriminator fields, hardware addresses such as Media Access Control addresses can be hopped. The hopped addresses are generated by random number generators having non-repeating sequence lengths that are easily determined a-priori, which can quickly jump ahead in sequence by an arbitrary number of random steps and which have the property that future random numbers are difficult to guess without knowing the random number generator's parameters. Synchronization techniques can be used to re-establish synchronization between sending and receiving nodes.
    Type: Application
    Filed: June 7, 2011
    Publication date: December 15, 2011
    Applicant: VIRNETX, INC.
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor, Douglas Charles Schmidt
  • Publication number: 20110238993
    Abstract: A plurality of computer nodes communicates using seemingly random IP source and destination addresses and (optionally) a seemingly random discriminator field. Data packets matching criteria defined by a moving window of valid addresses are accepted for further processing, while those that do not meet the criteria are rejected. In addition to “hopping” of IP addresses and discriminator fields, hardware addresses such as Media Access Control addresses can be hopped. The hopped addresses are generated by random number generators having non-repeating sequence lengths that are easily determined a-priori, which can quickly jump ahead in sequence by an arbitrary number of random steps and which have the property that future random numbers are difficult to guess without knowing the random number generator's parameters. Synchronization techniques can be used to re-establish synchronization between sending and receiving nodes.
    Type: Application
    Filed: June 6, 2011
    Publication date: September 29, 2011
    Applicant: VIRNETX, INC.
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor, Douglas Charles Schmidt
  • Patent number: 7996539
    Abstract: A plurality of computer nodes communicates using seemingly random IP source and destination addresses and (optionally) a seemingly random discriminator field. Data packets matching criteria defined by a moving window of valid addresses are accepted for further processing, while those that do not meet the criteria are rejected. In addition to “hopping” of IP addresses and discriminator fields, hardware addresses such as Media Access Control addresses can be hopped. The hopped addresses are generated by random number generators having non-repeating sequence lengths that are easily determined a-priori, which can quickly jump ahead in sequence by an arbitrary number of random steps and which have the property that future random numbers are difficult to guess without knowing the random number generator's parameters. Synchronization techniques can be used to re-establish synchronization between sending and receiving nodes.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: August 9, 2011
    Assignee: Virnetx, Inc.
    Inventors: Edmund Colby Munger, Vincent J. Sabio, Robert Dunham Short, III, Virgil D. Gligor, Douglas Charles Schmidt