Abstract: An artificial neuron including: a membrane capacitor; an input of an external synaptic excitation in current, the membrane capacitor integrating the input current; a negative-feedback impulse circuit, supplied by a power supply at a negative voltage between ?200 mV and 0 mV and at a positive voltage between 0 mV and +200 mV, including: a bridge based on pMOS and nMOS transistors in series and linked by a midpoint to the membrane capacitor, the midpoint defining the output of the artificial neuron, at least one delay capacitor between the gate and the source of one of the transistors of the bridge, at least two CMOS inverters between the membrane capacitor and the gates of the transistors of the bridge.

Abstract: An optical sensor, especially an artificial retina, that includes at least one photosensitive cell. Each cell includes a integration capacitor, a read circuit the operation of which depends on the charge of the integration capacitor, at least one MOS transistor operating subthreshold, and the drain-source current of which influences the charge on the integration capacitor, and at least one photodiode operating in photovoltaic mode and connected to the gate of this transistor, such that the drain-source current of the MOS transistor depends on the optical power received by the photodiode.

Abstract: An optical sensor, especially an artificial retina, that includes at least one photosensitive cell. Each cell includes a integration capacitor, a read circuit the operation of which depends on the charge of the integration capacitor at least one MOS transistor operating subthreshold, and the drain-source current of which influences the charge on the integration capacitor, and at least one photodiode operating in photovoltaic mode and connected to the gate of this transistor, such that the drain-source current of the MOS transistor depends on the optical power received by the photodiode.

Abstract: An artificial neuron including: a membrane capacitor; an input of an external synaptic excitation in current, the membrane capacitor integrating the input current; a negative-feedback impulse circuit, supplied by a power supply at a negative voltage between ?200 mV and 0 mV and at a positive voltage between 0 mV and +200 mV, including: a bridge based on pMOS and nMOS transistors in series and linked by a midpoint to the membrane capacitor, the midpoint defining the output of the artificial neuron, at least one delay capacitor between the gate and the source of one of the transistors of the bridge, at least two CMOS inverters between the membrane capacitor and the gates of the transistors of the bridge.