Patents by Inventor Vishak Chandrasekhar

Vishak Chandrasekhar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9625983
    Abstract: Integrated circuit devices, methods, and other embodiments associated with power throttling with temperature sensing and activity feedback are described. In one embodiment, an integrated circuit device includes temperature sensing logic, activity sensing logic, comparison logic, and signal logic. The temperature sensing logic is configured to output a temperature signal indicative of a temperature of a selected region of the device. The activity sensing logic is configured to output an activity signal indicative of a level of activity of a selected device function. The mode selection logic is configured to select the temperature signal or the activity signal. The comparison logic is configured to compare the selected signal to a series of threshold levels and output a comparison result. The signal logic is configured to generate a throttle signal based on the comparison result. The throttle signal is used to control a frequency of operation of a selected device component.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: April 18, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Jurgen M. Schulz, Vishak Chandrasekhar, Yu-Cheng Chiu
  • Patent number: 9608839
    Abstract: A system, comprising: a first local controller (LC) having a first position in a ring network and comprising a first LC cycle counter; a second LC having a second position in the ring network and comprising a second LC cycle counter; and a central controller (CC) connected to the ring network and comprising: a data structure linking the first LC to the first position and linking the second LC to the second position; and a CC cycle counter.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: March 28, 2017
    Assignee: Oracle International Corporation
    Inventors: Jurgen Schulz, Vishak Chandrasekhar, Yu-cheng Chiu
  • Publication number: 20160127147
    Abstract: A system, comprising: a first local controller (LC) having a first position in a ring network and comprising a first LC cycle counter; a second LC having a second position in the ring network and comprising a second LC cycle counter; and a central controller (CC) connected to the ring network and comprising: a data structure linking the first LC to the first position and linking the second LC to the second position; and a CC cycle counter.
    Type: Application
    Filed: October 29, 2014
    Publication date: May 5, 2016
    Inventors: Jurgen Schulz, Vishak Chandrasekhar, Yu-cheng Chiu
  • Patent number: 9256500
    Abstract: The disclosed embodiments disclose techniques for performing physical domain error isolation and recovery in a multi-domain system, where the multi-domain system includes two or more processor chips and one or more switch chips that provide connectivity and cache-coherency support for the processor chips, and the processor chips are divided into two or more distinct domains. During operation, one of the switch chips determines a fault in the multi-domain system. The switch chip determines an originating domain that is associated with the fault, and then signals the fault and an identifier for the originating domain to its internal units, some of which perform clearing operations that clear out all traffic for the originating domain without affecting the other domains of the multi-domain system.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: February 9, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Jurgen M. Schulz, Vishak Chandrasekhar, Wayne F. Seltzer, Brian J. McGee
  • Publication number: 20160018884
    Abstract: Integrated circuit devices, methods, and other embodiments associated with power throttling with temperature sensing and activity feedback are described. In one embodiment, an integrated circuit device includes temperature sensing logic, activity sensing logic, comparison logic, and signal logic. The temperature sensing logic is configured to output a temperature signal indicative of a temperature of a selected region of the device. The activity sensing logic is configured to output an activity signal indicative of a level of activity of a selected device function. The mode selection logic is configured to select the temperature signal or the activity signal. The comparison logic is configured to compare the selected signal to a series of threshold levels and output a comparison result. The signal logic is configured to generate a throttle signal based on the comparison result. The throttle signal is used to control a frequency of operation of a selected device component.
    Type: Application
    Filed: July 21, 2014
    Publication date: January 21, 2016
    Inventors: Jurgen M. SCHULZ, Vishak CHANDRASEKHAR, Yu-Cheng CHIU
  • Publication number: 20140310555
    Abstract: The disclosed embodiments disclose techniques for performing physical domain error isolation and recovery in a multi-domain system, where the multi-domain system includes two or more processor chips and one or more switch chips that provide connectivity and cache-coherency support for the processor chips, and the processor chips are divided into two or more distinct domains. During operation, one of the switch chips determines a fault in the multi-domain system. The switch chip determines an originating domain that is associated with the fault, and then signals the fault and an identifier for the originating domain to its internal units, some of which perform clearing operations that clear out all traffic for the originating domain without affecting the other domains of the multi-domain system.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 16, 2014
    Applicant: Oracle International Corporation
    Inventors: Jurgen M. Schulz, Vishak Chandrasekhar, Wayne F. Seltzer, Brian J. McGee