Abstract: Returning to FIG. 2, sense circuit 201 represents the circuit that must sense the signaling on an interconnect. NMOS device 202 is always on so that there is a continuous path to ground whenever PMOS driver 204 is on. Since leakage power is an order of magnitude less than static and dynamic power it can be omitted for clarity, although it should be noted that dynamic power increases with respect to line length since the interconnect capacitance increases as line length increases. Static power is due to flow of static current across the two resistances shown in FIG. 2, interconnect resistance 206 and the resistance of transistors 102 and 104 from FIG. 1, represented by the resistance of equivalent NMOS transistor 208 of FIG. 2.

Abstract: Circuit for differential current sensing with reduced static power. Embodiments of the present invention provide a reduced static power differential current sense amplifier (DCSA) that can use a self-timed shutoff system to disable the sense amplifier after sensing is done and enable the sense amplifier before the start of sensing. The current sense amplifier can include at least two cross-coupled inverters. A decoupling mechanism connected to the cross-coupled inverters can be provided. The decoupling mechanism accepts a sense enable (SE) signal that selectively enables and disables the current sense amplifier. A discharge mechanism can also be connected to the cross-coupled inverters to remove excess charge. A selectively enabled low impedance path from the cross-coupled inverters to ground can also be provided.