Patents by Inventor Vishal Chhabra

Vishal Chhabra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10658363
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a cut inside a replacement metal gate trench to mitigate n-p proximity effects and methods of manufacture. The structure described herein includes: a first device; a second device, adjacent to the first device; a dielectric material, of the first device and the second device, including a cut within a trench between the first device and the second device; and a common gate electrode shared with the first device and the second device, the common gate electrode provided over the dielectric material and contacting underlying material within the cut.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: May 19, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Balaji Kannan, Ayse M. Ozbek, Tao Chu, Bala Haran, Vishal Chhabra, Katsunori Onishi, Guowei Xu
  • Publication number: 20190393221
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a cut inside a replacement metal gate trench to mitigate n-p proximity effects and methods of manufacture. The structure described herein includes: a first device; a second device, adjacent to the first device; a dielectric material, of the first device and the second device, including a cut within a trench between the first device and the second device; and a common gate electrode shared with the first device and the second device, the common gate electrode provided over the dielectric material and contacting underlying material within the cut.
    Type: Application
    Filed: September 6, 2019
    Publication date: December 26, 2019
    Inventors: Balaji KANNAN, Ayse M. OZBEK, Tao CHU, Bala HARAN, Vishal CHHABRA, Katsunori ONISHI, Guowei XU
  • Patent number: 10446550
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a cut inside a replacement metal gate trench to mitigate n-p proximity effects and methods of manufacture. The structure described herein includes: a first device; a second device, adjacent to the first device; a dielectric material, of the first device and the second device, including a cut within a trench between the first device and the second device; and a common gate electrode shared with the first device and the second device, the common gate electrode provided over the dielectric material and contacting underlying material within the cut.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: October 15, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Balaji Kannan, Ayse M. Ozbek, Tao Chu, Bala Haran, Vishal Chhabra, Katsunori Onishi, Guowei Xu
  • Patent number: 10269932
    Abstract: One illustrative method disclosed herein includes, among other things, forming a first fin having first and second opposing sidewalls and forming a first sidewall spacer positioned adjacent the first sidewall and a second sidewall spacer positioned adjacent the second sidewall, wherein the first sidewall spacer has a greater height than the second sidewall spacer. In this example, the method further includes forming epitaxial semiconductor material on the fin and above the first and second sidewall spacers.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: April 23, 2019
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ankur Arya, Brian Greene, Qun Gao, Christopher Nassar, Junsic Hong, Vishal Chhabra
  • Publication number: 20190115346
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a cut inside a replacement metal gate trench to mitigate n-p proximity effects and methods of manufacture. The structure described herein includes: a first device; a second device, adjacent to the first device; a dielectric material, of the first device and the second device, including a cut within a trench between the first device and the second device; and a common gate electrode shared with the first device and the second device, the common gate electrode provided over the dielectric material and contacting underlying material within the cut.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 18, 2019
    Inventors: Balaji KANNAN, Ayse M. OZBEK, Tao CHU, Bala HARAN, Vishal CHHABRA, Katsunori ONISHI, Guowei XU
  • Patent number: 10020260
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a corrosion and/or etch protection layer for contacts and interconnect metallization integration structures and methods of manufacture. The structure includes a metallization structure formed within a trench of a substrate and a layer of cobalt phosphorous (CoP) on the metallization structure. The CoP layer is structured to prevent metal migration from the metallization structure and corrosion of the metallization structure during etching processes.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: July 10, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Shafaat Ahmed, Benjamin G. Moser, Vimal Kumar Kamineni, Dinesh Koli, Vishal Chhabra
  • Publication number: 20180182708
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a corrosion and/or etch protection layer for contacts and interconnect metallization integration structures and methods of manufacture. The structure includes a metallization structure formed within a trench of a substrate and a layer of cobalt phosphorous (CoP) on the metallization structure. The CoP layer is structured to prevent metal migration from the metallization structure and corrosion of the metallization structure during etching processes.
    Type: Application
    Filed: December 22, 2016
    Publication date: June 28, 2018
    Inventors: Shafaat AHMED, Benjamin G. MOSER, Vimal Kumar KAMINENI, Dinesh KOLI, Vishal CHHABRA
  • Publication number: 20180019162
    Abstract: A method of forming an amorphous carbon (aC) layer as a barrier layer for preventing etching of metals in a dual damascene metallization process and the resulting device are provided. Embodiments include forming an inter-layer dielectric (ILD) layer over a substrate with the first ILD having recesses for a first metallization layer. Then forming a TaN barrier layer and Co liner in the recesses, filling the recesses with a metal, forming a Co cap layer over the metal and forming a conformal aC layer over the substrate are accomplished. Furthermore, an Nblock layer, an ILD layer and a metal hard mask layer completes the stack on top to the aC layer. Subsequently, the embodiments include etching vias through this stack down to the aC layer, thereby protecting the first metallized layer.
    Type: Application
    Filed: July 13, 2016
    Publication date: January 18, 2018
    Inventors: Shafaat AHMED, Shahrukh Akbar KHAN, Vishal CHHABRA
  • Publication number: 20160041471
    Abstract: The present invention relates generally to semiconductor fabrication lithography and, more particularly, to a method and composition for reducing post-development defects and residues that may remain on a photoresist after development of the photoresist without causing substantial damage to the photoresist. The method may include rinsing the photoresist and the semiconductor device with ozonated acidified conductive water composed of a combination of ozone and a gaseous acid dissolved in deionized water.
    Type: Application
    Filed: August 7, 2014
    Publication date: February 11, 2016
    Inventors: Guillaume D. Briend, Vishal Chhabra, John A. Fitzsimmons
  • Patent number: 9058976
    Abstract: Cleaning solutions and processes for cleaning semiconductor devices or semiconductor tooling during manufacture thereof generally include contacting the semiconductor devices or semiconductor tooling with an acidic aqueous cleaning solution free of a fluorine containing compound, the acidic aqueous cleaning solution including at least one antioxidant and at least one non-oxidizing acid.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Vishal Chhabra, Laertis Economikos, John A. Fitzsimmons, James Hannah, Mahmoud Khojasteh, Jennifer Muncy
  • Publication number: 20150024989
    Abstract: Cleaning solutions and processes for cleaning semiconductor devices or semiconductor tooling during manufacture thereof generally include contacting the semiconductor devices or semiconductor tooling with an acidic aqueous cleaning solution free of a fluorine containing compound, the acidic aqueous cleaning solution including at least one antioxidant and at least one non-oxidizing acid.
    Type: Application
    Filed: October 9, 2014
    Publication date: January 22, 2015
    Inventors: Vishal Chhabra, Laertis Economikos, John A. Fitzsimmons, James Hannah, Mahmoud Khojasteh, Jennifer Muncy
  • Publication number: 20140128307
    Abstract: Cleaning solutions and processes for cleaning semiconductor devices or semiconductor tooling during manufacture thereof generally include contacting the semiconductor devices or semiconductor tooling with an acidic aqueous cleaning solution free of a fluorine containing compound, the acidic aqueous cleaning solution including at least one antioxidant and at least one non-oxidizing acid.
    Type: Application
    Filed: November 6, 2012
    Publication date: May 8, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vishal Chhabra, Laertis Economikos, John A. Fitzsimmons, James Hannah, Mahmoud Khojasteh, Jennifer Muncy
  • Patent number: 8647445
    Abstract: Cleaning processes for cleaning semiconductor devices or semiconductor tooling during manufacture thereof generally include contacting the semiconductor devices or semiconductor tooling with an antioxidant to form an insoluble adduct followed by solubilizing the adduct with a basic aqueous cleaning solution.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: February 11, 2014
    Assignee: International Business Machines Corporation
    Inventors: Vishal Chhabra, John A. Fitzsimmons, Mahmoud Khojasteh, Jennifer Muncy
  • Publication number: 20140008697
    Abstract: A composition includes an organopolysiloxane component (A) comprising at least one of a disiloxane, a trisiloxane, and a tetrasiloxane, and has an average of at least two alkenyl groups per molecule. The composition further includes an organohydrogensiloxane component (B) having an average of at least two silicon-bonded hydrogen atoms per molecule. Components (A) and (B) each independently have at least one of an alkyl group and an aryl group and each independently have a number average molecular weight less than or equal to 1500 (g/mole). The composition yet further includes a catalytic amount of a hydrosilylation catalyst component (C), and titanium dioxide (TiO2) nanoparticles (D). The composition has a molar ratio of alkyl groups to aryl groups ranging from 1:0.25 to 1:3.0. A product of the present invention is the reaction product of the composition, which may be used to make a light emitting diode.
    Type: Application
    Filed: December 6, 2011
    Publication date: January 9, 2014
    Inventors: Brian R. Harkness, Ann W. Norris, Shellene K. Thurston, Vishal Chhabra, Bharati S. Kulkarni, Nikhil R. Taskar
  • Publication number: 20070221939
    Abstract: An optically reliable high refractive index (HRI) encapsulant for use with Light Emitting Diodes (LED's) and lighting devices based thereon. This material may be used for optically reliable HRI lightguiding core material for polymer-based photonic waveguides for use in photonic-communication and optical-interconnect applications. The encapsulant includes treated nanoparticles coated with an organic functional group that are dispersed in an Epoxy resin or Silicone polymer, exhibiting RI˜1.7 or greater with a low value of optical absorption coefficient ?<0.5 cm?1 at 525 nm. The encapsulant makes use of compositionally modified TiO2 nanoparticles which impart a greater photodegradation resistance to the HRI encapsulant.
    Type: Application
    Filed: May 14, 2007
    Publication date: September 27, 2007
    Inventors: Nikhil Taskar, Vishal Chhabra, Aleksey Yekimov, Donald Dorman, Bharati Kulkarni
  • Patent number: 7175778
    Abstract: The present application is directed to the preparation and use of a class of nanoparticles called Quantum Confined Atoms or QCA's. A QCA is a particle of material comprising a plurality of host atoms in a nanoparticle of a size of less than 10 nm with a single atom of a dopant (or activator) confined within. The QCA's have unique luminescent and optical properties and thus can act as a very efficient nanophosphor which generate polarized light and can operate as a laser and a nanomagnet. An anti-agglomeration coating surrounding the nanoparticles can prevent clumping and loss of the enhanced properties.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: February 13, 2007
    Assignee: Nanocrystals Technology LP
    Inventors: Rameshwar Nath Bhargava, Vishal Chhabra
  • Patent number: 6534772
    Abstract: A microchannel phosphor screen for converting radiation, such as X-rays, into visible light. The screen includes a planar surface, which can be formed from glass, silicon or metal, which has etched therein a multiplicity of closely spaced microchannels having diameters of the order of 40 microns or less. Deposited within each of the microchannels is a multiplicity of phosphors which emit light when acted upon by radiation. The dimensions of the microchannel and the phosphors and the relationship between the microchannels and the phosphors is optimized so that the light output compares favorably with lower resolution non microchannel based scintillation screens. A photomultiplier can be integrated with the X-ray detector so as to provide an enhanced output for use with low level X-ray of for cine or fluoroscopy applications.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: March 18, 2003
    Assignee: Nanocrystal Imaging Corp.
    Inventors: Vishal Chhabra, Rameshwar Nath Bhargava, Dennis Gallagher, Samuel P. Herko, Bharati S. Kulkarni, Nikhil R. Taskar, Aleksey Yekimov
  • Patent number: 6452184
    Abstract: A composite phosphor screen for converting radiation, such as X-rays, into visible light. The screen includes a planar surface, which can be formed from glass, silicon or metal, which has etched therein a multiplicity of closely spaced microchannels having diameters of the order of 10 microns or less. Deposited within each of the microchannels is a multiplicity of phosphors which emit light when acted upon by radiation. A photomultiplier, which may be microchannel based, is integrated with the X-ray detector so as to provide an enhanced output for use with low level X-ray of for cine or fluoroscopy applications. The walls of the microchannels and/or the substrate surfaces include dielectric stack based light reflective coatings.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: September 17, 2002
    Assignee: Nanocrystal Imaging Corp.
    Inventors: Nikhil R. Taskar, John Victor D. Veliadis, Vishal Chhabra, Bharail Kulkarni, Neeta Pandit, Rameshwar Nath Bhargava, Roger Delano
  • Patent number: 6361824
    Abstract: Methodology for providing a smooth, thin, highly reflective coating to the walls of microchannels disposed in a plate or substrate. Such plates are commonly used in image intensifiers and have more recently been used to provide high resolution X-ray imaging screens. In the process silver nitrate solution is reacted so as to provide a silver amine complex. In a first embodiment of the process, the microchannel plates are disposed vertically in a beaker and immersed, without stirring, in a solution including the silver amine complex and a reducing agent. In a second embodiment of the process, a fluid flow of filtered reactant is directed through the microchannels. In each embodiment the walls of the microchannels become plated with a highly reflective (>90%), thin (20-50nm) and smooth coating of metallic silver.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: March 26, 2002
    Assignee: Nanocrystal Imaging Corp.
    Inventors: Aleksey Yekimov, Vishal Chhabra
  • Patent number: 6300640
    Abstract: A composite phosphor screen for converting radiation, such as X-rays, into visible light. The screen includes a planar surface, which can be formed from glass, silicon or metal, which has etched therein a multiplicity of closely spaced microchannels having diameters of the order of 10 microns or less. Deposited within each of the microchannels is a multiplicity of phosphors which emit light when acted upon by radiation. The walls of the microchannels and/or the substrate surfaces include light reflective coatings so as to reflect the light emitted by the phosphors to the light collecting devices, such as film or an electronic detector. The coatings can be either radiation transparent or filtering/attenuating depending on the particular application.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: October 9, 2001
    Assignee: Nanocrystal Imaging Corporation
    Inventors: Rameshwar Nath Bhargava, Nikhil R. Taskar, Vishal Chhabra, John Victor D. Veliadis