Abstract: A system according to one embodiment includes a host central processing unit (CPU); a first storage medium configured to be in communication with the host CPU and to store information associated with at least one address; a second storage medium configured to be in communication with the host CPU, to store patch information associated with the at least one address of the first storage medium; and selection circuitry configured to, in response to a fetch instruction from the host CPU, select the patch information from the second storage medium if the fetch instruction contains a destination address that matches the at least one address associated with the patch information.

Abstract: Cell reselection comprises monitoring a first indicator indicative of a signaling level of the serving cell, and monitoring second indicators, each indicative of a signaling level of one of plural potential target cells. A timer associated with a potential target cell is initiated when the respective second indicator indicates that the signaling level of the potential target cell is better than the signaling level of the serving cell. Each timer has an associated expiry, and, if at least one timer has been initiated by the expiry of another initiated timer, then, after delaying for an additional period after at least the first timer has expired, a target cell is selected from the potential target cells. The target cell is selected that has a second indicator which indicates that the signaling level of the respective target cell is better than the signaling level of the serving cell.