Abstract: Disclosed below are representative embodiments of methods, apparatus, and systems for performing power analysis during the design and verification of a circuit. Certain exemplary embodiments include user interfaces and software infrastructures that provide a flexible and powerful environment for performing power analysis. For example, embodiments of the disclosed technology can be used to construct complex and targeted power queries that quickly provide a designer with power information during a circuit design process. The disclosed methods can be implemented by a software tool (e.g., a power analysis tool or other EDA tool) that computes and reports power characteristics in a circuit design (e.g., a system-on-a-chip design or other integrated design).

Abstract: Disclosed below are representative embodiments of methods, apparatus, and systems for performing power analysis during the design and verification of a circuit. Certain exemplary embodiments include user interfaces and software infrastructures that provide a flexible and powerful environment for performing power analysis. For example, embodiments of the disclosed technology can be used to construct complex and targeted power queries that quickly provide a designer with power information during a circuit design process. The disclosed methods can be implemented by a software tool (e.g., a power analysis tool or other EDA tool) that computes and reports power characteristics in a circuit design (e.g., a system-on-a-chip design or other integrated design).