Abstract: A method of forming a porous composite material in which substantially all of the pores within the composite material are small having a diameter of about 5 nm or less and with a narrow PSD is provided.

Abstract: A method of forming a porous composite material in which substantially all of the pores within the composite material are small having a diameter of about 5 nm or less and with a narrow PSD is provided. The porous composite material includes a first solid phase having a first characteristic dimension and a second phase comprised of pores having a second characteristic dimension, wherein the characteristic dimensions of at least one of said phases is controlled to a value of about 5 nm or less.

Abstract: A multiphase ultra low k dielectric process incorporating an organo-silicon precursor including an organic porogen, high frequency radio frequency power just above plasma initiation in a PECVD chamber and energy post treatment. A porous SiCOH dielectric material having a k less than 2.7 and a modulus of elasticity greater than 7 GPa. A graded carbon adhesion layer of SiO2 and porous SiCOH.

Abstract: A method of forming a porous composite material in which substantially all of the pores within the composite material are small having a diameter of about 5 nm or less and with a narrow PSD is provided.

Abstract: A method of forming a porous composite material in which substantially all of the pores within the composite material are small having a diameter of about 5 nm or less and with a narrow PSD is provided. The porous composite material includes a first solid phase having a first characteristic dimension and a second phase comprised of pores having a second characteristic dimension, wherein the characteristic dimensions of at least one of said phases is controlled to a value of about 5 nm or less.

Abstract: A semiconductor device structure and method for manufacture includes a substrate having a top first layer; a second thin transition layer located on top of the first layer; and, a third layer located on top of the transition layer, wherein the second thin transition layer provides strong adhesion and cohesive strength between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective transition bonding layers disposed to enhance interfacial strength among the different layers. Further, an electronic device structure incorporates layers of insulating and conductive materials as intralevel or interlevel dielectrics in a back-end-of-the-line (“BEOL”) wiring structure in which the interfacial strength between different pairs of dielectric films is enhanced by a thin intermediate transition bonding layer.

Abstract: The present invention provides a porous composite material in which substantially all of the pores within the composite material are small having a diameter of about 5 nm or less and with a narrow PSD. The inventive composite material is also characterized by the substantial absence of the broad distribution of larger sized pores which is prevalent in prior art porous composite materials. The porous composite material includes a first solid phase having a first characteristic dimension and a second solid phase comprised of pores having a second characteristic dimension, wherein the characteristic dimensions of at least one of said phases is controlled to a value of about 5 nm or less.

Abstract: The present invention provides a porous composite material in which substantially all of the pores within the composite material are small having a diameter of about 5 nm or less and with a narrow PSD. The inventive composite material is also characterized by the substantial absence of the broad distribution of larger sized pores which is prevalent in prior art porous composite materials. The porous composite material includes a first solid phase having a first characteristic dimension and a second solid phase comprised of pores having a second characteristic dimension, wherein the characteristic dimensions of at least one of said phases is controlled to a value of about 5 nm or less.

Abstract: A porous composite material useful in semiconductor device manufacturing, in which the diameter (or characteristic dimension) of the pores and the pore size distribution (PSD) is controlled in a nanoscale manner and which exhibits improved cohesive strength (or equivalently, improved fracture toughness or reduced brittleness), and increased resistance to water degradation of properties such as stress-corrosion cracking, Cu ingress, and other critical properties is provided. The porous composite material is fabricating utilizing at least one bifunctional organic porogen as a precursor compound.

Abstract: A method for fabricating a thermally stable ultralow dielectric constant film including Si, C, O and H atoms in a parallel plate chemical vapor deposition process utilizing a plasma enhanced chemical vapor deposition (“PECVD”) process is disclosed. Electronic devices containing insulating layers of thermally stable ultralow dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of a thermally stable ultralow dielectric constant film, specific precursor materials are used, such as, silane derivatives, for instance, diethoxymethylsilane (DEMS) and organic molecules, for instance, bicycloheptadiene and cyclopentene oxide.

Abstract: A method for providing an alignment surface for liquid crystal molecules in a liquid crystal display, comprising depositing on an optically transparent substrate an optically transparent film; and irradiating the film with nitrogen ions sufficiently to produce a pretilt angle of preferably greater than ten degrees. The film is preferably comprised of diamond like carbon. A liquid crystal display formed in accordance with the method.

Abstract: A diffusion barrier useful in semiconductor electronic devices, such as multi-level interconnect wiring structures, is provided. The diffusion barrier is characterized as having a low-dielectric constant of less than 3.5, preferably less than 3.0, as well as being capable of substantially preventing Cu and/or oxygen from diffusing into the active device areas of the electronic device. Since the diffusion barrier has a low-dielectric constant, the diffusion barrier has only a minor effect on the effective dielectric constant of the interconnect structure. The low-k diffusion barrier includes atoms of Si, C, H and N. The N atoms are non-uniformly distributed within the low-k diffusion barrier. Optionally, the low-k diffusion barrier may include atoms of Ge, O, halogens such as F or any combination thereof.

Abstract: A semiconductor device structure and method for manufacture includes a substrate having a top first layer; a second thin transition layer located on top of the first layer; and, a third layer located on top of the transition layer, wherein the second thin transition layer provides strong adhesion and cohesive strength between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective transition bonding layers disposed to enhance interfacial strength among the different layers. Further, an electronic device structure incorporates layers of insulating and conductive materials as intralevel or interlevel dielectrics in a back-end-of-the-line (“BEOL”) wiring structure in which the interfacial strength between different pairs of dielectric films is enhanced by a thin intermediate transition bonding layer.

Abstract: A method for fabricating a thermally stable ultralow dielectric constant film comprising Si, C, O and H atoms in a parallel plate chemical vapor deposition process utilizing a plasma enhanced chemical vapor deposition (“PECVD”) process is disclosed. Electronic devices containing insulating layers of thermally stable ultralow dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of a thermally stable ultralow dielectric constant film, specific precursor materials are used, such as, silane derivatives, for instance, diethoxymethylsilane (DEMS) and organic molecules, for instance, bicycloheptadiene and cyclopentene oxide.

Abstract: A structure and a method are disclosed of an enhanced T-gate for modulation doped field effect transistors (MODFETs). The enhanced T-gate has insulator spacer layers sandwiching the neck portion of the T-gate. The spacer layers are thinner than the T-bar portion overhang. The insulating layer provides mechanical support and protects the vulnerable neck portion of the T-gate from chemical attack during subsequent device processing, making the T-gate structure highly scalable and improving yield. The use of thin conformal low dielectric constant insulating layers ensures a low parasitic gate capacitance, and reduces the risk of shorting gate and source metallurgy when source-to-gate spacings are reduced to smaller dimensions.

Abstract: A method for fabricating a thermally stable ultralow dielectric constant film comprising Si, C, O and H atoms in a parallel plate chemical vapor deposition process utilizing plasma enhanced chemical vapor deposition (“PECVD”) process is disclosed. Electronic devices containing insulating layers of thermally stable ultralow dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of thermally stable ultralow dielectric constant film, specific precursor materials are used, such as, cyclic siloxanes and organic molecules containing ring structures, for instance, tetramethylcycloterasiloxane and cyclopentene oxide.

Abstract: A method for fabricating a thermally stable ultralow dielectric constant film comprising Si, C, O and H atoms in a parallel plate chemical vapor deposition process utilizing plasma enhanced chemical vapor deposition (“PECVD”) process is disclosed. To enable the fabrication of thermally stable ultralow dielectric constant film, specific precursor materials are used, such as, cyclic siloxanes and organic molecules containing ring structures, for instance, tetramethylcycloterasiloxane and cyclopentene oxide. To stabilize plasma in the PECVD reactor and thereby improve uniformity of the deposited film, CO2 is added to TMCTS as a carrier gas, or CO2 or a mixture of CO2 and O2 are added to the PECVD reactor.

Abstract: There is provided a thermally stable ultralow dielectric constant film comprising Si, C, O and H atoms and having a covalently bonded tri-dimensional network structure and a dielectric constant of not more than 2.6. The dielectric constant film may additionally have a covalently bonded ring network. The covalently bonded tri-dimensional (i.e., three dimensional) network structure comprises Si—O, Si—C, Si—H, C—H and C—C covalent bonds and may optionally contain F and N. In the film, the Si atoms may optionally be partially substituted with Ge atoms. The dielectric constant film has a thickness of not more than 1.3 micrometers and a crack propagation velocity in water of less than 10−10 meters per second. There is further provided a back-end-of-the-line (BEOL) interconnect structure comprising the inventive dielectric film as a BEOL insulator, cap or hardmask layer.

Abstract: A structure and a method are disclosed of an enhanced T-gate for modulation doped field effect transistors (MODFETs). The enhanced T-gate has insulator spacer layers sandwiching the neck portion of the T-gate. The spacer layers are thinner than the T-bar portion overhang. The insulating layer provides mechanical support and protects the vulnerable neck portion of the T-gate from chemical attack during subsequent device processing, making the T-gate structure highly scalable and improving yield. The use of thin conformal low dielectric constant insulating layers ensures a low parasitic gate capacitance, and reduces the risk of shorting gate and source metallurgy when source-to-gate spacings are reduced to smaller dimensions.

Abstract: A semiconductor device structure and method for manufacture includes a substrate having a top first layer of dielectric material; a second layer of material selected from the group including: amorphous Silicon (a-Si), amorphous Ge (a-Ge) or alloys thereof, located on top of the first layer; and, a third layer located on top of the a-Si, a-Ge, or alloys thereof layer, wherein the second layer provides adhesion between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective a-Si, a-Ge, or alloys thereof bonding layers disposed to enhance adhesion between the different layers.