Patents by Inventor Vishram Shriram Pandit

Vishram Shriram Pandit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220375898
    Abstract: An Integrated Circuit (IC) package is provided, comprising a first IC die having a first capacitor and a logic circuit, and a second IC die having a second capacitor. The first IC die and the second IC die may be stacked within the IC package one on top of another and electrically coupled with die-to-die interconnects. The logic circuit is electrically coupled in a power delivery network to the first capacitor and the second capacitor. The first IC die and the second IC die include respective back-end-of-line portions in which the first capacitor and the second capacitor, which may comprise metal-insulator-metal capacitors in some embodiments are situated. In some embodiments, the second capacitor is situated in a shadow of the logic circuit. In various embodiments, the first IC die and the second IC die comprise any suitable pair in a plurality of stacked IC dies within an IC package.
    Type: Application
    Filed: May 18, 2021
    Publication date: November 24, 2022
    Applicant: Intel Corporation
    Inventors: Vishram Shriram Pandit, Narayanan Natarajan, Jayanth M. Kalyan, Khondker Z. Ahmed, Jonathan P. Douglas, Gururaj K. Shamanna, Chin Lee Kuan
  • Patent number: 11450936
    Abstract: A communication system communicates data elements on a conducting wire. In an embodiment, a sequence of data elements to be transmitted is electrically represented on a pair of terminals, and a transmission element located at a first portion of the conducting wire transmits the sequence in the form of a wave on a surface of the conducting wire. The transmission element includes a first conductor wrapped around the first portion of the conducting wire, a first insulator located between the first conductor and the first portion of the conducting wire, and a conductive structure disposed around the first conductor. The conductive structure has a narrow cross section at one end and extends outwardly to a broader cross section at the other end. A first terminal of the pair of terminals is electrically connected to the first conductor and the second terminal is electrically connected to the conductive structure.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: September 20, 2022
    Assignee: Intel Corporation
    Inventors: Ramaswamy Parthasarathy, Punit Ashok Rathod, Jayprakash Thakur, Arvind Sundaram, Ajay Sharma, Nikita Bipin Ambasana, Satish Ramachandra, Vishram Shriram Pandit
  • Publication number: 20220201842
    Abstract: In some implementations, an electronics system includes a voltage regulator circuit of a PDN configured to generate a power signal, a printed circuit board (PCB) comprising a power rail to deliver the power signal to a digital circuit generating an interfering signal. The PDN radiating the interfering signal or its harmonics impacting the functionality of destination antenna and circuits (such as Wi-Fi, Bluetooth, cellular, etc.). The system includes a filtering element configured to filter an interfering signal generated by the digital circuit. The filtering element includes a first set of low impedance (low-Z) segments and a second set of high impedance (high-Z) segments. The low-Z and high-Z segments are formed using a copper trace of the power rail and are serially connected to each other. The filtering element forms a low pass filter and filters out high frequency interfering signal going to the destination antenna and circuits by radiated means.
    Type: Application
    Filed: December 22, 2020
    Publication date: June 23, 2022
    Inventors: Vishram Shriram Pandit, Yagnesh Vinodrai Waghela
  • Publication number: 20220132654
    Abstract: A wave launcher may include a printed circuit board (PCB) that includes a pin that receives a radio frequency (RF) signal. The wave launcher may include a cylinder configured to be electrically coupled to the pin and define an opening. The cylinder may receive the RF signal from the pin, form a transition from coplanar to Goubau line structure with a plate, and generate the surface wave. The wave launcher may include an insulator configured to be physically positioned within the opening and between the cylinder and a power line. The insulator may mechanically isolate the cylinder from the power line and permit the cylinder to launch the surface wave on the power line. The wave launcher may include the plate electrically coupled to a pad and may provide a reference for the pin and the cylinder. The pin and the cylinder may be physically positioned proximate the plate.
    Type: Application
    Filed: June 22, 2021
    Publication date: April 28, 2022
    Inventors: Vishram Shriram PANDIT, Neel Harkishin BHATIA, Rajiv PANIGRAHI, Ramaswamy PARTHASARATHY, Satish RAMACHANDRA, Ajay SHARMA, Manish SHARMA, Vaibhavdeep SINGH, Ravichandra TUNGANI CHIKKABASAVAIAH, Jayprakash THAKUR
  • Publication number: 20210203053
    Abstract: A communication system communicates data elements on a conducting wire. In an embodiment, a sequence of data elements to be transmitted is electrically represented on a pair of terminals, and a transmission element located at a first portion of the conducting wire transmits the sequence in the form of a wave on a surface of the conducting wire. The transmission element includes a first conductor wrapped around the first portion of the conducting wire, a first insulator located between the first conductor and the first portion of the conducting wire, and a conductive structure disposed around the first conductor. The conductive structure has a narrow cross section at one end and extends outwardly to a broader cross section at the other end. A first terminal of the pair of terminals is electrically connected to the first conductor and the second terminal is electrically connected to the conductive structure.
    Type: Application
    Filed: September 24, 2020
    Publication date: July 1, 2021
    Inventors: Ramaswamy Parthasarathy, Punit Ashok Rathod, Jayprakash Thakur, Arvind Sundaram, Ajay Sharma, Nikita Bipin Ambasana, Satish Ramachandra, Vishram Shriram Pandit