Patents by Inventor Visvamohan Yegnashankaran

Visvamohan Yegnashankaran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9941886
    Abstract: An embodiment of the present invention is an identification circuit for generating an identification number (ID). The identification circuit includes a plurality of identification cells each comprising a latch having a first output and a second output that are opposite to each other. The first output and the second output are a function of process variations of the identification circuit. A first buffer and a second buffer are provided on both sides of the latch and connected to the first output and the second output of the latch, respectively.
    Type: Grant
    Filed: August 12, 2017
    Date of Patent: April 10, 2018
    Assignee: Casinda Inc.
    Inventors: Jimmy Yong Xiao, Surendra Kumar Rathaur, Visvamohan Yegnashankaran
  • Publication number: 20170366185
    Abstract: An embodiment of the present invention is an identification circuit for generating an identification number (ID). The identification circuit includes a plurality of identification cells each comprising a latch having a first output and a second output that are opposite to each other. The first output and the second output are a function of process variations of the identification circuit. A first buffer and a second buffer are provided on both sides of the latch and connected to the first output and the second output of the latch, respectively.
    Type: Application
    Filed: August 12, 2017
    Publication date: December 21, 2017
    Applicant: Casinda, Inc.
    Inventors: Jimmy Yong Xiao, Surendra Kumar Rathaur, Visvamohan Yegnashankaran
  • Patent number: 9768781
    Abstract: An embodiment of the present invention is an identification circuit for generating an identification number (ID). The identification circuit includes a plurality of identification cells each comprising a latch having a first output and a second output that are opposite to each other. The first output and the second output are a function of process variations of the identification circuit. A first buffer and a second buffer are provided on both sides of the latch and connected to the first output and the second output of the latch, respectively.
    Type: Grant
    Filed: April 11, 2015
    Date of Patent: September 19, 2017
    Assignee: Casinda, Inc.
    Inventors: Jimmy Yong Xiao, Surendra Kumar Rathaur, Visvamohan Yegnashankaran
  • Publication number: 20160301413
    Abstract: An embodiment of the present invention is an identification circuit for generating an identification number (ID). The identification circuit includes a plurality of identification cells each comprising a latch having a first output and a second output that are opposite to each other. The first output and the second output are a function of process variations of the identification circuit. A first buffer and a second buffer are provided on both sides of the latch and connected to the first output and the second output of the latch, respectively.
    Type: Application
    Filed: April 11, 2015
    Publication date: October 13, 2016
    Applicant: CASINDA, INC.
    Inventors: Jimmy Yong Xiao, Surendra Kumar Rathaur, Visvamohan Yegnashankaran
  • Patent number: 8303484
    Abstract: A self-propelled robotic device moves through bodily and other passageways by inflating regions of an overlying bladder along the length of the robotic device in a sequence that imparts motion to the device. The regions of the overlying bladder are inflated by energizing a plurality of coils, which are surrounded by a ferrofluid, in a sequence. The ferrofluid responds to the magnetic field created by an energized coil by creating a bulge in the side wall of the overlying bladder.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: November 6, 2012
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Philipp Lindorfer, William French, Visvamohan Yegnashankaran
  • Patent number: 8288834
    Abstract: Various semiconductor devices can be formed at the end of a common fabrication process, thereby significantly improving manufacturing flexibility, by selectively wiring bonding different CMOS circuits to different MEMS, which are formed on the same semiconductor die. A semiconductor device that has a number of CMOS circuits and a number of MEMS is formed on the same semiconductor wafer in adjacent regions on the wafer, and then diced such that the CMOS circuits and the MEMS are formed on the same die. After dicing, different CMOS circuits and different MEMS can be selectively connected during the wire bonding step to form the different semiconductor devices.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: October 16, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Gobi R. Padmanabhan, Visvamohan Yegnashankaran
  • Patent number: 8198150
    Abstract: A low thermal pathway is provided from the top surface of a silicon substrate to the bottom surface of the silicon substrate by first forming aluminum plugs in the bottom surface of the silicon substrate that contact the silicon substrate and extend up towards the top surface, and then heating the aluminum plugs to a temperature for a period of time sufficient to cause spikes to grow from the sides of the aluminum plugs.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: June 12, 2012
    Assignee: National Semiconductor Corporation
    Inventor: Visvamohan Yegnashankaran
  • Publication number: 20120067396
    Abstract: A solar concentrator is implemented with a plate structure that has a surface and one or more hydrophobic regions on the surface of the plate structure. The plate structure is transparent to visible light. A fluid is sprayed onto the surface of the plate structure where the fluid forms droplets on the hydrophobic regions. The droplets capture substantially all angles of incident solar radiation and deliver concentrated solar radiation to a corresponding number of solar cells.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 22, 2012
    Inventors: Visvamohan Yegnashankaran, Akshey Sehgal, Jamal Ramdani
  • Patent number: 7996034
    Abstract: A cellular telephone handset utilizes an electrically-steered directional antenna to increase the received signal strength when the handset is in a poor signal environment. As a result, the handset reduces the need for an end user to tilt and twirl their head to try and find the direction of the strongest signal strength.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: August 9, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Visvamohan Yegnashankaran, Ahmad Bahai
  • Publication number: 20110118607
    Abstract: A self-propelled robotic device moves through bodily and other passageways by inflating regions of an overlying bladder along the length of the robotic device in a sequence that imparts motion to the device. The regions of the overlying bladder are inflated by energizing a plurality of coils, which are surrounded by a ferrofluid, in a sequence. The ferrofluid responds to the magnetic field created by an energized coil by creating a bulge in the side wall of the overlying bladder.
    Type: Application
    Filed: November 19, 2009
    Publication date: May 19, 2011
    Inventors: Peter J. Hopper, Philipp Lindorfer, William French, Visvamohan Yegnashankaran
  • Patent number: 7863644
    Abstract: NPN and PNP bipolar junction transistors are formed on a wafer in a fabrication process that eliminates the heavily-doped buried layers and the lightly-doped epitaxial layer by forming back side collector contacts that are electrically connected to an interconnect structure on the top side of the wafer with through-the-wafer contacts.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: January 4, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Visvamohan Yegnashankaran, Hengyang Lin
  • Patent number: 7790602
    Abstract: A method of forming capacitive structures in trenches which have been formed in a multilevel metal interconnect structure is disclosed. The method of forming the capacitive structures allows the capacitance of the multilevel metal interconnect structure to be adjusted, and thereby optimized, to respond to signals from devices that are formed on an underlying substrate.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: September 7, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Visvamohan Yegnashankaran, Gobi R. Padmanabhan
  • Patent number: 7764517
    Abstract: Detection and control circuitry are added to a conventional power supply to detect when a load, such as a portable electronic device, has been disconnected from the power supply and, when disconnected, interrupt a current path to the primary windings of a transformer within the power supply to substantially reduce the amount of reactive power that is consumed by the power supply.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: July 27, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Visvamohan Yegnashankaran, Peter J. Hopper
  • Patent number: 7754502
    Abstract: Minute materials which can be undesirably left on the backside of a semiconductor wafer are detected by scanning the semiconductor wafer with an infra-red (IR) light following the completion of a process step that forms and then selectively removes a material from the top surface of the wafer. Any detected material can then be removed from the backside of the wafer to ensure that that backside of the wafer is clean and flat.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: July 13, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Visvamohan Yegnashankaran
  • Patent number: 7705421
    Abstract: An integrated circuit inductor has a number of vertical metal segments, a number of lower metal straps that electrically connect alternate metal segments, and a number of upper metal straps that electrically connect alternate metal segments to form a continuous electrical path. Layers of a ferromagnetic material are formed normal to the metal segments to extend past at least two sides of each metal segment to increase the inductance of the inductor.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: April 27, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Visvamohan Yegnashankaran
  • Patent number: 7646064
    Abstract: A low thermal pathway is provided from the top surface of a silicon substrate to the bottom surface of the silicon substrate by first forming aluminum plugs in the bottom surface of the silicon substrate that contact the silicon substrate and extend up towards the top surface, and then heating the aluminum plugs to a temperature for a period of time sufficient to cause spikes to grow from the sides of the aluminum plugs.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: January 12, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Visvamohan Yegnashankaran
  • Patent number: 7633131
    Abstract: A semiconductor sensor device is formed using MEMS technology by placing a thin layer of single-crystal silicon, which includes semiconductor devices, over a cavity, which has been formed in a semiconductor material. The thin layer of single-crystal silicon can be formed by forming the semiconductor devices in the top surface of a single-crystal silicon wafer, thinning the silicon wafer to a desired thickness, and then dicing the thinned wafer to form silicon layers of a desired size. The MEMS device can be used to implement a pressure sensor, microphone, temperature sensor, and a joystick.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: December 15, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Gobi R. Padmanabhan, Visvamohan Yegnashankaran
  • Publication number: 20090116269
    Abstract: Detection and control circuitry are added to a conventional power supply to detect when a load, such as a portable electronic device, has been disconnected from the power supply and, when disconnected, interrupt a current path to the primary windings of a transformer within the power supply to substantially reduce the amount of reactive power that is consumed by the power supply.
    Type: Application
    Filed: November 2, 2007
    Publication date: May 7, 2009
    Inventors: Visvamohan Yegnashankaran, Peter J. Hopper
  • Patent number: 7482228
    Abstract: The width of the gate of a MOS transistor can be formed to have nanometer-width gate sizes, which are substantially less than the minimum feature size that can be photolithographically obtained with the method that is used to fabricate the MOS transistors, in a litho-less process by utilizing a conductive side wall spacer to form the gate of the MOS transistor.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: January 27, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Gobi R. Padmanabhan, Visvamohan Yegnashankaran
  • Patent number: 7338840
    Abstract: Thermal hot spots in the substrate of a semiconductor die, and the required surface area of the semiconductor die, are substantially reduced by forming thermal or thermal and electrical pipes in the substrate that extend from a bottom surface of the substrate to a point near the top surface of the substrate.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: March 4, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Gobi R. Padmanabhan, Visvamohan Yegnashankaran