Abstract: In described examples, an analog to digital converter (ADC) includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.

Abstract: The disclosure provides an analog to digital converter (ADC). The ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.

Abstract: An ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.

Abstract: The disclosure provides an analog to digital converter (ADC). The ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.

Abstract: The rate at which the output of an output buffer changes is determined, and the strength of the output buffer is modified until the rate of change reaches a desired rate. The desired rate may be selected such that strength of the output buffer matches the then existing load. In other words, the strength may be only as much as needed to drive the then existing load. As a result, effects such as switching noise may be considerably reduced.

Abstract: The rate at which the output of an output buffer changes is determined, and the strength of the output buffer is modified until the rate of change reaches a desired rate. The desired rate may be selected such that strength of the output buffer matches the then existing load. In other words, the strength may be only as much as needed to drive the then existing load. As a result, effects such as switching noise may be considerably reduced.