Patents by Inventor Viswanadham Puligandla
Viswanadham Puligandla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9540863Abstract: An insulated glass unit (IGU) comprises a first pane of a transparent material and a second pane of a transparent material. The second pane is spaced apart from the first pane to define a cavity therebetween. At least one of a spacer and an array of stand-off members is disposed between the first and second panes to maintain separation therebetween. A first adhesive layer forms at least a portion of a gas-tight connection between the first pane and the second pane. A highly gas-restrictive coating is disposed over the adhesive layer, where the coating is an inorganic layer.Type: GrantFiled: February 10, 2015Date of Patent: January 10, 2017Assignee: EverSealed Windows, Inc.Inventors: Seth A. Miller, David H. Stark, William H. Francis, IV, Viswanadham Puligandla, Edward N. Boulos, John Pernicka
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Publication number: 20150218876Abstract: An insulated glass unit (IGU) comprises a first pane of a transparent material and a second pane of a transparent material. The second pane is spaced apart from the first pane to define a cavity therebetween. At least one of a spacer and an array of stand-off members is disposed between the first and second panes to maintain separation therebetween. A first adhesive layer forms at least a portion of a gas-tight connection between the first pane and the second pane. A highly gas-restrictive coating is disposed over the adhesive layer, where the coating is an inorganic layer.Type: ApplicationFiled: February 10, 2015Publication date: August 6, 2015Inventors: SETH A. MILLER, DAVID H. STARK, WILLIAM H. FRANCIS, IV, VISWANADHAM PULIGANDLA, EDWARD N. BOULOS, JOHN PERNICKA
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Patent number: 8950162Abstract: A vacuum insulated glass unit (VIGU) comprises a first pane of a transparent material and a second pane of a transparent material. The second pane is spaced apart from the first pane to define a cavity therebetween. At least one of a spacer and an array of stand-off members is disposed between the first and second panes to maintain separation therebetween. A first adhesive layer forms at least a portion of a gas-tight connection between the first pane and the second pane. A highly hermetic coating is disposed over the adhesive layer, where the coating is an inorganic layer.Type: GrantFiled: June 2, 2011Date of Patent: February 10, 2015Assignee: EverSealed Windows, Inc.Inventors: Seth A. Miller, David H. Stark, William H. Francis, IV, Viswanadham Puligandla, Edward N. Boulos, John Pernicka
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Publication number: 20110296771Abstract: A vacuum insulated glass unit (VIGU) comprises a first pane of a transparent material and a second pane of a transparent material. The second pane is spaced apart from the first pane to define a cavity therebetween. At least one of a spacer and an array of stand-off members is disposed between the first and second panes to maintain separation therebetween. A first adhesive layer forms at least a portion of a gas-tight connection between the first pane and the second pane. A highly hermetic coating is disposed over the adhesive layer, where the coating is an inorganic layer.Type: ApplicationFiled: June 2, 2011Publication date: December 8, 2011Inventors: SETH A. MILLER, DAVID H. STARK, WILLIAM H. FRANCIS, IV, VISWANADHAM PULIGANDLA, EDWARD N. BOULOS, JOHN PERNICKA
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Publication number: 20070080925Abstract: Low power consumption display devices are disclosed. Phoactive layers are utilized that both respond to electrical energy to allow a display device to display information and that generate electrical energy in response to incident radiation. Display pixels of a single display device may be divided displaying and generating pixels. The displaying pixels may display information and the generating pixels may generate electrical energy. The generated electrical energy may be used to provide power to drive an image.Type: ApplicationFiled: October 11, 2005Publication date: April 12, 2007Applicant: Nokia CorporationInventors: Zoran Radivojevic, Jukka Rantala, Steven Dunford, Viswanadham Puligandla, Jouko Korppi-Tommola, Jani Kallioinen
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Publication number: 20040258556Abstract: According to one aspect of the invention, a modified Sn—Ag—Cu, lead-free solder alloy is disclosed. The alloy comprises an additive element selected from the group consisting of Au, Ni, Pd, Fe, Co, Zn, Cr and combinations thereof, present in the alloy in an amount effect to form an intermetallic interface between the alloy a substrate, the intermetallic interface having a composite structure without scallop formation and including Sn islands.Type: ApplicationFiled: October 2, 2003Publication date: December 23, 2004Applicants: Nokia Corporation, Board of Regents, University of Texas SystemInventors: Choong-Un Kim, Jae-Yong Park, Rajendra R. Kabade, Ted Carper, Steven Dunford, Viswanadham Puligandla
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Patent number: 6236115Abstract: Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement.Type: GrantFiled: July 29, 1999Date of Patent: May 22, 2001Assignee: International Business Machines CorporationInventors: Michael Anthony Gaynes, Alan James Emerick, Viswanadham Puligandla, Charles Gerard Woychik, Jerzy Maria Zalesinski
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Patent number: 6187678Abstract: Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement.Type: GrantFiled: August 24, 1999Date of Patent: February 13, 2001Assignee: International Business Machines CorporationInventors: Michael Anthony Gaynes, Alan James Emerick, Viswanadham Puligandla, Charles Gerard Woychik, Jerzy Maria Zalesinski
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Patent number: 6002177Abstract: Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement.Type: GrantFiled: December 27, 1995Date of Patent: December 14, 1999Assignee: International Business Machines CorporationInventors: Michael Anthony Gaynes, Alan James Emerick, Viswanadham Puligandla, Charles Gerard Woychik, Jerzy Maria Zalesinski
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Patent number: 5747101Abstract: A simple process for card assembly by Direct Chip Attachment (DCA) uses electrically conductive adhesives. Two methods create the same intermediate wafer product with a layer of insulative thermoplastic and conductive thermoplastic bumps. After sawing or dicing the wafer to form the chips, the chips are adhered to chip carriers with conductive pads which match the conductive thermoplastic bumps, using heat and pressure. Chips may be easily removed and replaced using heat.Type: GrantFiled: April 9, 1996Date of Patent: May 5, 1998Assignee: International Business Machines CorporationInventors: Richard B. Booth, Michael A. Gaynes, Robert M. Murcko, Viswanadham Puligandla, Judith M. Roldan, Ravi Saraf, Jerzy M. Zalesinski
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Patent number: 5543585Abstract: A simple process for card assembly by Direct Chip Attachment (DCA) uses electrically conductive adhesives. Two methods create the same intermediate wafer product with a layer of insulative thermoplastic and conductive thermoplastic bumps. After sawing or dicing the wafer to form the chips, the chips are adhered to chip carriers with conductive pads which match the conductive thermoplastic bumps, using heat and pressure. Chips may be easily removed and replaced using heat.Type: GrantFiled: February 2, 1994Date of Patent: August 6, 1996Assignee: International Business Machines CorporationInventors: Richard B. Booth, Michael A. Gaynes, Robert M. Murco, Viswanadham Puligandla, Judith M. Roldan, Ravi Saraf, Jerzy M. Zalesinski
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Patent number: 4473602Abstract: A method for electroless nickel plating of silicon-iron which has been heat treated prior to the plating operation and subjected to thermal shock after the plating operation includes the steps of cleaning the surface of the silicon-iron with a fluoride etch salt, forming a thin deposit of palladium on the clean surface of the silicon-iron, hardening the palladium deposit by treatment with a solution of ammonium hydroxide and nickel plating the silicon-iron using an electroless nickel plating solution, followed by baking at about 250.degree. F. for about six hours.Type: GrantFiled: December 30, 1982Date of Patent: September 25, 1984Assignee: International Business Machines CorporationInventors: Viswanadham Puligandla, Deepak K. Verma
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Patent number: 4427448Abstract: An oil-based corrosion inhibitor containing an aliphatic amine, a fatty acid and its ester, and an organotin compound provides improved corrosion resistance to metals and is easily removed when the metals are to be processed.Type: GrantFiled: June 7, 1982Date of Patent: January 24, 1984Assignee: International Business Machines CorporationInventors: Lenas J. Hedlund, Viswanadham Puligandla