Patents by Inventor Visweh Ananthakrishnan

Visweh Ananthakrishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Maintaining packet order using hash-based linked-list queues
    Patent number: 7243184
    Abstract: Ordering logic ensures that data items being processed by a number of parallel processing units are unloaded from the processing units in the original per-flow order that the data items were loaded into the parallel processing units. The ordering logic includes a pointer memory, a tail vector, and a head vector. Through these three elements, the ordering logic keeps track of a number of “virtual queues” corresponding to the data flows. A round robin arbiter unloads data items from the processing units only when a data item is at the head of its virtual queue.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: July 10, 2007
    Assignee: Juniper Networks, Inc.
    Inventors: Dennis C. Ferguson, Philippe Lacroute, Chi-Chung Chen, Gerald Cheung, Tatao Chuang, Pankaj Patel, Visweh Ananthakrishnan