Patents by Inventor Viswesh Ananthakrishnan
Viswesh Ananthakrishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230080654Abstract: Identifying causal relationships between outlier telemetry events in telemetry metric data using machine learning ensembles of an autoencoder and an attention mechanism provides an automated framework for root cause analysis. Outlier telemetry events are detected across a cloud of telemetry events using unsupervised learning models. To establish a causal relationship between outlier telemetry events, autoencoder/attention mechanism ensembles are trained for pairs of telemetry metrics. When inputs of sequences of telemetry events of a first telemetry metric and a second telemetry metric to the ensemble have sufficiently high loss value, a causal relationship is inferred. Internal node values of the attention mechanism from the input identify specific time stamps for the first telemetry metric that have a causal relationship with the outlier telemetry event.Type: ApplicationFiled: September 13, 2021Publication date: March 16, 2023Inventors: Zhen Han Si, Claudionor Jose Nunes Coelho, JR., Viswesh Ananthakrishnan, Eyal Firstenberg
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Publication number: 20220385635Abstract: A system generates vector representations of entries of traffic logs generated by a firewall. A first model learns contexts of values recorded in the logs during training, and the system extracts vector representations of the values from the trained model. For each log entry, vectors created for the corresponding values are combined to create a vector representing the entry. Cluster analysis of the vector representations can be performed to determine clusters of similar traffic and outliers indicative of potentially anomalous traffic. The system also generates a formal model representing firewall behavior which comprises formulas generated from the firewall rules. Proposed traffic scenarios not recorded in the logs can be evaluated based on the formulas to determine actions which the firewall would take in the scenarios. The combination of models which implement machine learning and formal techniques facilitates evaluation of both observed and hypothetical network traffic based on the firewall rules.Type: ApplicationFiled: September 13, 2021Publication date: December 1, 2022Inventors: Charanraj Thimmisetty, Praveen Tiwari, Viswesh Ananthakrishnan, Claudionor Jose Nunes Coelho, JR.
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Patent number: 11496492Abstract: Systems and methods are provided for managing false positives in a network anomaly detection system. The methods may include receiving a plurality of anomaly reports; extracting fields, and values for the fields, from each of the anomaly reports; grouping the anomaly reports into a plurality of groups according to association rule learning, wherein each group is defined by a respective rule; for each group, creating a cluster based on common values for the fields; and marking each cluster as a possible false positive anomaly cluster.Type: GrantFiled: August 14, 2019Date of Patent: November 8, 2022Assignee: Hewlett Packard Enterprise Development LPInventors: Unum Sarfraz, Mohan Parthasarathy, Brijesh Nambiar, Min-Yi Shen, Viswesh Ananthakrishnan
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Publication number: 20210051165Abstract: Systems and methods are provided for managing false positives in a network anomaly detection system. The methods may include receiving a plurality of anomaly reports; extracting fields, and values for the fields, from each of the anomaly reports; grouping the anomaly reports into a plurality of groups according to association rule learning, wherein each group is defined by a respective rule; for each group, creating a cluster based on common values for the fields; and marking each cluster as a possible false positive anomaly cluster.Type: ApplicationFiled: August 14, 2019Publication date: February 18, 2021Inventors: UNUM SARFRAZ, MOHAN PARTHASARATHY, BRIJESH NAMBIAR, MIN-YI SHEN, VISWESH ANANTHAKRISHNAN
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Patent number: 8611216Abstract: Ordering logic ensures that data items being processed by a number of parallel processing units are unloaded from the processing units in the original per-flow order that the data items were loaded into the parallel processing units. The ordering logic includes a pointer memory, a tail vector, and a head vector. Through these three elements, the ordering logic keeps track of a number of “virtual queues” corresponding to the data flows. A round robin arbiter unloads data items from the processing units only when a data item is at the head of its virtual queue.Type: GrantFiled: September 30, 2011Date of Patent: December 17, 2013Assignee: Juniper Networks, Inc.Inventors: Dennis C. Ferguson, Philippe Lacroute, Chi-Chung Chen, Gerald Cheung, Tatao Chuang, Pankaj Patel, Viswesh Ananthakrishnan
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Publication number: 20120027019Abstract: Ordering logic ensures that data items being processed by a number of parallel processing units are unloaded from the processing units in the original per-flow order that the data items were loaded into the parallel processing units. The ordering logic includes a pointer memory, a tail vector, and a head vector. Through these three elements, the ordering logic keeps track of a number of “virtual queues” corresponding to the data flows. A round robin arbiter unloads data items from the processing units only when a data item is at the head of its virtual queue.Type: ApplicationFiled: September 30, 2011Publication date: February 2, 2012Applicant: JUNIPER NETWORKS, INC.Inventors: Dennis C. FERGUSON, Philippe LACROUTE, Chi-Chung CHEN, Gerald CHEUNG, Tatao CHUANG, Pankaj PATEL, Viswesh ANANTHAKRISHNAN
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Patent number: 7856510Abstract: A key engine that performs route lookups for a plurality of keys may include a data processing portion configured to process one data item at a time and to request data when needed. A buffer may be configured to store a partial result from the data processing portion. A controller may be configured to load the partial result from the data processing portion into the buffer. The controller also may be configured to input another data item into the data processing portion for processing while requested data is obtained for a prior data item. A number of these key engines may be used by a routing unit to perform a large number of route lookups at the same time.Type: GrantFiled: May 15, 2008Date of Patent: December 21, 2010Assignee: Juniper Networks, Inc.Inventors: Pankaj Patel, Viswesh Ananthakrishnan
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Publication number: 20100246584Abstract: Ordering logic ensures that data items being processed by a number of parallel processing units are unloaded from the processing units in the original per-flow order that the data items were loaded into the parallel processing units. The ordering logic includes a pointer memory, a tail vector, and a head vector. Through these three elements, the ordering logic keeps track of a number of “virtual queues” corresponding to the data flows. A round robin arbiter unloads data items from the processing units only when a data item is at the head of its virtual queue.Type: ApplicationFiled: June 15, 2010Publication date: September 30, 2010Applicant: JUNIPER NETWORKS, INC.Inventors: Dennis C. FERGUSON, Philippe LACROUTE, Chi-Chung CHEN, Gerald CHEUNG, Tatao CHUANG, Pankaj PATEL, Viswesh ANANTHAKRISHNAN
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Patent number: 7764606Abstract: Ordering logic ensures that data items being processed by a number of parallel processing units are unloaded from the processing units in the original per-flow order that the data items were loaded into the parallel processing units. The ordering logic includes a pointer memory, a tail vector, and a head vector. Through these three elements, the ordering logic keeps track of a number of “virtual queues” corresponding to the data flows. A round robin arbiter unloads data items from the processing units only when a data item is at the head of its virtual queue.Type: GrantFiled: May 30, 2007Date of Patent: July 27, 2010Assignee: Juniper Networks, Inc.Inventors: Dennis C. Ferguson, Philippe Lacroute, Chi-Chung Chen, Gerald Cheung, Tatao Chuang, Pankaj Patel, Viswesh Ananthakrishnan
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Patent number: 7389360Abstract: A key engine that performs route lookups for a plurality of keys may include a data processing portion configured to process one data item at a time and to request data when needed. A buffer may be configured to store a partial result from the data processing portion. A controller may be configured to load the partial result from the data processing portion into the buffer. The controller also may be configured to input another data item into the data processing portion for processing while requested data is obtained for a prior data item. A number of these key engines may be used by a routing unit to perform a large number of route lookups at the same time.Type: GrantFiled: November 5, 2001Date of Patent: June 17, 2008Assignee: Juniper Networks, Inc.Inventors: Pankaj Patel, Viswesh Ananthakrishnan