Abstract: A wafer chip scale package (WCSP) comprises first and second dies in differing voltage domains and an isolation material between the first and second dies and contacting multiple surfaces of each of the first and second dies. The package also comprises a first resin material contacting multiple surfaces of the isolation material, with the isolation material between the resin material and the first and second dies. The package also comprises a fiberglass material contacting a surface of the resin material and a second resin material contacting a surface of the fiberglass material. The package also comprises first and second conductive structures coupled to the first and second dies, respectively. The package also includes a passivation material contacting the first and second dies and the first and second conductive structures.

Abstract: An example includes: a package substrate having a die pad with a device side surface and a thermal pad on an opposite side surface; a thermal dissipation structure mounted to the die pad, the thermal dissipation structure including a thermally conductive insulator core and thermal conductors on a device side surface and on a substrate mount surface opposite the device side surface; at least one semiconductor device die mounted to the device side surface of the thermal dissipation structure; electrical connections formed between leads on the package substrate and bond pads on the at least one semiconductor device die; and mold compound covering the electrical connections, the at least one semiconductor device, and portions of the package substrate, portions of the leads of the package substrate forming terminals, and the thermal pad exposed from the mold compound and forming a thermal pad for a semiconductor device package.

Abstract: A method for handling a display device in an extended reality (XR) environment, includes: obtaining at least one media of a scene comprising a plurality of display devices; determining at least one pixel group comprising locations of the plurality of display devices in the at least one media; determining at least one parameter based on the at least one determined pixel group, wherein the at least one parameter comprises at least one of a frequency and a duty cycle; extracting a pulse width modulation (PWM) signal corresponding to the display device from the plurality of display devices based on the at least one parameter; and recognizing the display device from the plurality of display devices by correlating the extracted PWM signal with an identifier (ID) of the display device stored in at least one memory of the XR device.

Abstract: An electronic device includes a multilevel ceramic body, first, second, and third plates, and first and second semiconductor dies, with the multilevel ceramic body having opposite first and second sides, a first and second openings in the first side, a third opening in the second side, and a ceramic separator structure defining first and second interior portions between the first and second openings. The first plate is attached to the first side and covers the first opening, the second plate is attached to the first side and covers the second opening, the third plate is attached to the second side and covers the third opening, the first semiconductor die is in the first interior portion, and the second semiconductor die is in the second interior portion of the ceramic body.

Abstract: An electronic device includes a package structure, a lead, a heat slug, a semiconductor die, and a bond wire. The package structure has opposite first and second sides, and opposite third and fourth sides spaced along a first direction. The heat slug has a first portion partially exposed outside the second side of the package structure, and a second portion with slots extending inwardly along the first direction and fins between respective pairs of the slots, where the fins are enclosed by the package structure and spaced along an orthogonal second direction. The semiconductor die is attached to the heat slug, and the bond wire has a first end connected to the lead and a second end connected to a circuit of the semiconductor die.

Abstract: An electronic device includes a substrate having first and second conductive traces, a semiconductor die having a transistor with a first terminal and a second terminal, and first and second metal clips. The first metal clip has a first end portion coupled to the first terminal of the transistor, and a second end portion coupled to the first conductive trace of the substrate. The second metal clip has a first end portion coupled to the second terminal of the transistor and a second end portion coupled to the second conductive trace of the substrate, and a middle portion of the second metal clip is spaced apart from and at least partially overlying a portion of the first metal clip.

Abstract: Among the various aspects of the present disclosure is the provision of treatments, monitoring treatment or progression, or methods for detecting utDNA in a subject having or suspected of having a urinary tract-associated cancer.

Abstract: In examples, a method of manufacturing a semiconductor package comprises providing a lead frame having multiple conductive pins coupled thereto; positioning the lead frame within a mold chase and applying a strip of mold compound to the multiple conductive pins along a length of the lead frame; trimming connections between the lead frame and the multiple conductive pins; bending the multiple conductive pins; trimming the strip of mold compound to singulate the multiple conductive pins from each other and from the lead frame to form singulated conductive pins; coupling a singulated conductive pin from among the singulated conductive pins to a substrate such that a portion of the strip of mold compound coupled to the singulated conductive pin is in contact with the substrate and such that a segment of the singulated conductive pin extends vertically in a plane that is orthogonal to the substrate; coupling a semiconductor die to the substrate; and covering the substrate, the semiconductor die, the portion of the

Abstract: A multi-chip isolation (ISO) device package includes a leadframe including leads, an interposer substrate including a top copper layer and a bottom metal layer, with a dielectric layer in-between. A first IC die and a second IC die include circuitry including a transmitter or a receiver, and first and second bond pads are both attached top side up in the package. A laminate transformer is attached to the top copper layer positioned lateral to the IC die. Bondwires wirebond the first bond pads to first pads on the laminate transformer and to a first group of the leads or the lead terminals, and bondwires wirebond the second bond pads to second pads on the laminate transformer and to a second group of the leads or the lead terminals. A mold compound provides encapsulation.

Abstract: An electronic device includes an embedded die frame having a cavity and a routing structure, a semiconductor die in the cavity with a gallium nitride layer on the routing structure, and a heat spreader having a thermally conductive insulator layer and a metal plate, the thermally conductive insulator layer having a first side that faces the embedded die frame and an opposite second side that faces away from the embedded die frame, with a portion of the first side of the thermally conductive insulator layer extending over a side of a silicon substrate of the semiconductor die, and the metal plate on the second side of the thermally conductive insulator layer.

Abstract: An electronic device with an integrated transformer including a first substrate having a first patterned conductive feature with multiple turns that form a first winding, and a first molded magnetic material that encloses a portion of the first patterned conductive feature, and an adhesive layer on a side of the first substrate. The transformer also includes a second substrate having a second patterned conductive feature with multiple turns that form a second winding, and a second molded magnetic material that encloses a portion of the second patterned conductive feature, the second substrate extending on the adhesive layer to magnetically couple the first and second windings. The electronic device includes a package structure that encloses the first and second substrates.

Abstract: An isolated power converter package includes a leadframe including a first and second die pad, first and second supports connected to first leads, second leads. A first semiconductor die is on the first die pad and a second semiconductor die is on the second die pad. The molded transformer includes a top and bottom side magnetic sheet each having a magnetic mold material including magnetic particles in a second dielectric material on respective sides of a laminate substrate including a dielectric material and a first coil and a second coil that each include a coil contact. Edges of the laminate substrate are on the supports. Bond wires are between the first die bond pads and the second leads, between the second die bond pads and the second leads, between the first die bond pads and coil contacts, and between the second die bond pads and the coil contacts.

Abstract: Determining attributes for a stream of live content (e.g., live-streaming videos) is described. Initially, a stream of live content is received. One or more attributes are then extracted from a first segment and a second segment of the stream. The first segment and the second segment of the stream may have the same predetermined duration and the second segment may at least partially overlap with the first segment. The one or more attributes extracted from the first segment may be transmitted at a first time, such as at a first break in the stream of content. The one or more attributes extracted from the second segment may be transmitted at a second time, such as at a second break in the stream of content. The attributes from the first and second segments may be transmitted to a content provider and/or a creative provider, such as an advertiser.

Abstract: An isolated power converter package includes a leadframe including a first and second die pad, first and second supports connected to first leads, second leads. A first semiconductor die is on the first die pad and a second semiconductor die is on the second die pad. The molded transformer includes a top and bottom side magnetic sheet each having a magnetic mold material including magnetic particles in a second dielectric material on respective sides of a laminate substrate including a dielectric material and a first coil and a second coil that each include a coil contact. Edges of the laminate substrate are on the supports. Bond wires are between the first die bond pads and the second leads, between the second die bond pads and the second leads, between the first die bond pads and coil contacts, and between the second die bond pads and the coil contacts.

Abstract: A described example includes: a heat slug having a board side surface and an opposite top side surface; a package substrate mounted to the heat slug, the package substrate including overhanging leads extending over the board side surface of the heat slug, the package substrate having downset portions including a downset rail that runs along one side of a die mount area; at least one semiconductor device having a backside surface mounted to the board side surface of the heat slug; electrical connections coupling bond pads of the semiconductor device to the overhanging leads of the package substrate and to the downset rail; and mold compound covering the at least one semiconductor device, the electrical connections, a portion of the leads and the board side surface of the heat slug, the top side surface at least partially exposed from the mold compound.

Abstract: In a described example, an apparatus includes: a package substrate having a die mount surface; semiconductor die flip chip mounted to the package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the active surface of the semiconductor die and connected to the package substrate by solder joints; a thermal interposer comprising a thermally conductive material positioned over and in thermal contact with a backside surface of the semiconductor die; and mold compound covering a portion of the package substrate, a portion of the thermal interposer, the semiconductor die, and the post connects, the thermal interposer having a surface exposed from the mold compound.

Abstract: This description relates generally to semiconductor devices and processes. A method for forming a packaged semiconductor package can include attaching a front side of a metal layer to a die pad of a leadframe that includes conductive terminals, so a periphery portion of the metal layer extends beyond a periphery pad surface of the die pad, and a portion of a half-etched cavity on the front side of the metal layer is located near the periphery pad surface of the die pad. The method further includes attaching a semiconductor device to the die pad and encapsulating the semiconductor device, the front side of the metal layer, a portion of a back side of the metal layer, and a portion of the conductive terminals to form a packaged semiconductor device.

Abstract: A system and method for automating the process of gathering information from taxpayers for tax practitioner-filed tax returns. The system and method automates the collection of taxpayer information from multiple sources to pre-populate a digital tax file prior to gathering information from a taxpayer. The tax information automatically collected and loaded (e.g. pre-populated) is organized in standardized digital tax files for every taxpayer, per tax year. The standardized digital tax file is automatically generated and the standardized format created enables the automation of tax preparation and filing workflows.

Abstract: A multi-chip isolation (ISO) device package includes a leadframe including leads, an interposer substrate including a top copper layer and a bottom metal layer, with a dielectric layer in-between. A first IC die and a second IC die include circuitry including a transmitter or a receiver, and first and second bond pads are both attached top side up in the package. A laminate transformer is attached to the top copper layer positioned lateral to the IC die. Bondwires wirebond the first bond pads to first pads on the laminate transformer and to a first group of the leads or the lead terminals, and bondwires wirebond the second bond pads to second pads on the laminate transformer and to a second group of the leads or the lead terminals. A mold compound provides encapsulation.

Abstract: In a described example a device includes: a first corner formed between a circuit side surface of a semiconductor die and a first sidewall formed with a first depth extending along a side of the semiconductor die from the circuit side surface; a ledge having a planar surface formed parallel to the circuit side surface of the semiconductor die formed at the first depth from the circuit side surface at the first corner, and being perpendicular to the first sidewall; a second corner formed by an intersection of the planar surface of the ledge and a scribe lane sidewall of the semiconductor die, forming a second sidewall perpendicular to the circuit side surface; and portions of the circuit side surface of the semiconductor die, the first corner, the first sidewall, and the planar surface of the ledge covered by a passivation layer.