Patents by Inventor Vivek Bhan

Vivek Bhan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11100255
    Abstract: Methods and systems are disclosed for protecting a host device from one or more power surges transmitted from a sink device. When a sink device is detected as being connected to the host device, a limited level of power is provided to the sink device over a power transmission line and the sink device is authenticated. A normal level of power is provided to the sink device only if the authentication is successful, otherwise a reduced level of power is provided.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: August 24, 2021
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Sabin Eftimie, Gregory Fattig, Vivek Bhan, Chanchal Gupta
  • Patent number: 11056210
    Abstract: A method of producing an apparatus comprising an electrical circuit that has one or more characteristics that meet a design specification is presented. The method includes designing the electrical circuit with a trim circuit having a trim value that is variable, The electrical circuit is adjustable based on the trim value of the trim circuit. There is encoding of the functional circuit information and/or trim circuit information in a tag, The method has a reading of the functional circuit information and/or the trim circuit information stored in the tag and the determining of the trim value for the trim circuit that results in the characteristic of the electrical circuit meeting the design specification using the functional circuit information and/or the trim circuit information.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: July 6, 2021
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Michael Laisne, Vivek Bhan, Hans Martin von Staudt
  • Patent number: 8204166
    Abstract: An apparatus including a multiplexer configured to provide an output clock selected from a source clock, a destination clock, and a transition clock is provided. The apparatus further includes a phase difference calculation module configured to calculate a phase difference between the source clock and the destination clock and a clock generation module configured to generate a plurality of clocks. The apparatus further includes a clock selection module configured to select one of the plurality of clocks as the transition clock and a control circuit configured to provide: (1) a signal to the clock selection module for selecting one of the plurality of clocks as the transition clock based on the phase difference between the source clock and the destination clock and (2) a signal to the multiplexer to provide as the output clock one of the source clock, the destination clock, or the transition clock.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: June 19, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Srinivasa R. Bommareddy, Uday Padmanabhan, Samir J. Soni, Koichi E. Nomura, Nicholas F. Jungels, Vivek Bhan
  • Patent number: 8170166
    Abstract: Apparatus, systems, and methods are provided for transmitting messages over a serial interface. A method comprises receiving a first signal at a first time and receiving a second signal at a second time, the second time being after the first time. If a difference between the second time and the first time is less than a threshold time period, the method comprises generating a first message that is representative of the first signal and the second signal and transmitting the first message over the serial interface. In accordance with one embodiment, the threshold time period is equal to one half of an interface acquisition delay time period associated with the serial interface.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: May 1, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kenneth E. Stebbings, Vivek Bhan, Daniel B. Schwartz
  • Patent number: 8000665
    Abstract: Systems and methods are provided for controlling headroom of an amplifier (e.g., in a transmitter). A method comprises obtaining a target output power for a current interval and obtaining a target headroom for a subsequent interval. The method continues by adjusting, during the current interval, the power output capability of the amplifier based on the target headroom and adjusting the input power of an input signal based on the target output power, such that the output power of the amplifier is substantially constant during the current interval as the power output capability of the amplifier is adjusted.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: August 16, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kenneth Stebbings, Vivek Bhan, Daniel B. Schwartz, Bing Xu
  • Publication number: 20100215133
    Abstract: Apparatus, systems, and methods are provided for transmitting messages over a serial interface. A method comprises receiving a first signal at a first time and receiving a second signal at a second time, the second time being after the first time. If a difference between the second time and the first time is less than a threshold time period, the method comprises generating a first message that is representative of the first signal and the second signal and transmitting the first message over the serial interface. In accordance with one embodiment, the threshold time period is equal to one half of an interface acquisition delay time period associated with the serial interface.
    Type: Application
    Filed: February 25, 2009
    Publication date: August 26, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kenneth E. Stebbings, Vivek Bhan, Daniel B. Schwartz
  • Publication number: 20100105343
    Abstract: Systems and methods are provided for controlling headroom of an amplifier (e.g., in a transmitter). A method comprises obtaining a target output power for a current interval and obtaining a target headroom for a subsequent interval. The method continues by adjusting, during the current interval, the power output capability of the amplifier based on the target headroom and adjusting the input power of an input signal based on the target output power, such that the output power of the amplifier is substantially constant during the current interval as the power output capability of the amplifier is adjusted.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 29, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kenneth E. Stebbings, Vivek Bhan, Daniel B. Schwartz, Bing Xu
  • Publication number: 20090092214
    Abstract: An apparatus including a multiplexer configured to provide an output clock selected from a source clock, a destination clock, and a transition clock is provided. The apparatus further includes a phase difference calculation module configured to calculate a phase difference between the source clock and the destination clock and a clock generation module configured to generate a plurality of clocks. The apparatus further includes a clock selection module configured to select one of the plurality of clocks as the transition clock and a control circuit configured to provide: (1) a signal to the clock selection module for selecting one of the plurality of clocks as the transition clock based on the phase difference between the source clock and the destination clock and (2) a signal to the multiplexer to provide as the output clock one of the source clock, the destination clock, or the transition clock.
    Type: Application
    Filed: October 8, 2007
    Publication date: April 9, 2009
    Inventors: Srinivasa R. Bommareddy, Uday Padmanabhan, Samir J. Soni, Koichi E. Nomura, Nicholas F. Jungels, Vivek Bhan