Patents by Inventor Vivek G. Pawar

Vivek G. Pawar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6393385
    Abstract: A simulator for simulating a digital circuit, includes an input circuit for inputting a test patterns to describe the characteristics of the digital circuit and for inputting input signals to test the operation of digital circuit and output signals to describe the expected output of the digital circuit based on the input signals, an applying circuit to apply the input signal to test the operation of the digital circuit to the test patterns to describe the characteristics of the digital circuit to form a simulated output signal to indicate a response based on the test pattern, a comparator circuit to compare the simulated output signal with the output signal to describe the expected output of the digital circuit based on the input signals to determine a difference between the simulated output signal and the output signals, wherein the operation of the simulation is stopped if the difference is greater than a predetermined difference.
    Type: Grant
    Filed: May 28, 1996
    Date of Patent: May 21, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Vivek G. Pawar, Srikanth Natarajan, C. Srinivasan
  • Patent number: 5951711
    Abstract: A Hamming distance calculation device (10) includes a bit comparator (12) for determining nonmatching bit positions between two digital words. A current signal is generated for each nonmatching bit position by a nonmatching current generator (14). The current signals created are combined to produce a summed current signal that drives a first reference current comparator (18), a second reference current comparator (20), and an nth reference current comparator (22). The first reference current comparator (18) compares the summed current signal with a reference current signal to produce an output and a select signal that determines a reference current signal used in the second reference current comparator (20). The second reference current comparator (20) compares the summed current signal with a reference current signal as selected by the first reference current comparator (18) and produces an output in response thereof.
    Type: Grant
    Filed: December 30, 1993
    Date of Patent: September 14, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Shivaling S. Mahant-Shetti, Vivek G. Pawar