Patents by Inventor Vivek Kishorechand Arora

Vivek Kishorechand Arora has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923281
    Abstract: A semiconductor package includes a metallic pad and leads, a semiconductor die attached to the metallic pad, the semiconductor die including an active side with bond pads opposite the metallic pad, a wire bond extending from a respective bond pad of the semiconductor die to a respective lead of the leads, a heat spreader over the active side of the semiconductor die with a gap separating the active side of the semiconductor die from the heat spreader, an electrically insulating material within the gap and in contact with the active side of the semiconductor die and the heat spreader; and mold compound covering the semiconductor die and the wire bond, and partially covering the metallic pad and the heat spreader, with the metallic pad exposed on a first outer surface of the semiconductor package and with the heat spreader exposed on a second outer surface of the semiconductor package.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: March 5, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anindya Poddar, Woochan Kim, Vivek Kishorechand Arora
  • Patent number: 11869839
    Abstract: A packaged electronic device includes a semiconductor die with an electronic component and a contact structure connected to the electronic component, as well as an organic panel frame, a lamination structure that partially embeds the semiconductor die in an opening of the organic panel frame, and a ceramic substrate mounted to a first side of the semiconductor die.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: January 9, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Woochan Kim, Benjamin Allen Samples, Vivek Kishorechand Arora
  • Publication number: 20230413467
    Abstract: A power conversion module and method of forming the same includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module. The motherboard includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node and a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power module includes a first daughterboard mounted on the first surface of the motherboard and a second daughterboard mounted on the second surface of the motherboard.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 21, 2023
    Inventors: Woochan Kim, Vivek Kishorechand Arora, David Ryan Huitink, Hayden Seth Carlton, Fang Luo, Asif Imran Emon
  • Publication number: 20230395514
    Abstract: An example semiconductor package comprises a multi-layer substrate having a bottom metal layer, a top metal layer, and a first insulation layer between bottom metal layer and the top metal layer. A plurality of first conductive traces are formed in the top metal layer. A second insulation layer is disposed over the exposed portions of the first insulation layer and over segments of the first conductive traces. A plurality of second conductive traces formed on top of the second insulation layer. One or more semiconductor dies are mounted on the one or more second segments of the conductive traces. One or more bond wires couple the semiconductor dies to one or more of the second conductive traces. A mold compound covers at least a portion of the semiconductor dies, the second insulation layer, the first conductive traces, and the second conductive traces.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Inventors: Kwnag-Soo Kim, Vivek Kishorechand Arora, Woochan Kim
  • Publication number: 20230386963
    Abstract: A power converter module includes a substrate having a first surface and a second surface that opposes the first surface. The power converter module includes a thick printed copper (TPC) substrate on the first surface of the substrate. The TPC substrate includes a first layer having TPC patterned on the first surface of the substrate and a second layer with dielectric patterned on the first layer. The TPC substrate includes a third layer having TPC patterned on the second layer. The power converter module includes power transistors mounted on the TPC substrate and a control integrated circuit (IC) chip mounted on the TPC substrate.
    Type: Application
    Filed: May 31, 2022
    Publication date: November 30, 2023
    Inventors: WOOCHAN KIM, Vivek Kishorechand Arora, Ninad Shahane, Makoto Shibuya
  • Publication number: 20230378034
    Abstract: A semiconductor package includes a substrate, a set of terminals protruding from a first surface of the substrate, a power stage physically and thermally coupled to the first surface of the substrate, and a flexible circuit including at least one circuit layer forming power stage conductors and control circuit conductors disposed on a flexible insulating substrate layer. The power stage is between the flexible circuit and the substrate and is mounted on a first surface of the flexible circuit such that the power stage is electrically connected to the power stage conductors. The package includes a die mounted on a second surface of the flexible circuit opposite the power stage. An output of the die is electrically connected to an input of the power stage via the control circuit conductors.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Inventors: Woochan Kim, Vivek Kishorechand Arora
  • Publication number: 20230378022
    Abstract: A power module includes an interconnect of an integrated circuit (IC) package having a heat slug. The power module also includes a direct bonded copper (DBC) substrate. The DBC substrate has a first surface formed of pattern copper, the patterned copper has a pad and a second surface that opposes the first surface, the second surface has a sheet of copper. The second surface of the DBC substrate is thermally coupled to the heat slug. The power module further includes a die mounted on the pad of the first surface of the DBC substrate. The die has a power transistor. The die and the heat slug are thermally coupled and electrically isolated.
    Type: Application
    Filed: May 20, 2022
    Publication date: November 23, 2023
    Inventors: KWANG-SOO KIM, Vivek Kishorechand Arora, Woochan Kim
  • Publication number: 20230307314
    Abstract: A semiconductor device includes a direct bonded copper (DBC) substrate including a plurality of indentations in at least a top side of a ceramic substrate. The plurality of indentations are filled with a metal filler to provide metal filled dimples. A top copper layer is a patterned layer that is on the top side and provides leads, and there is at least one semiconductor die having bond pads electrically connected to the leads.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 28, 2023
    Inventors: Kwnag-Soo Kim, Makoto Shibuya, Vivek Kishorechand Arora
  • Patent number: 11751353
    Abstract: A power conversion module and method of forming the same includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module. The motherboard includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node and a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power module includes a first daughterboard mounted on the first surface of the motherboard and a second daughterboard mounted on the second surface of the motherboard.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: September 5, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Woochan Kim, Vivek Kishorechand Arora, David Ryan Huitink, Hayden Seth Carlton, Fang Luo, Asif Imran Emon
  • Patent number: 11715679
    Abstract: A semiconductor package includes a substrate, a set of terminals protruding from a first surface of the substrate, a power stage physically and thermally coupled to the first surface of the substrate, and a flexible circuit including at least one circuit layer forming power stage conductors and control circuit conductors disposed on a flexible insulating substrate layer. The power stage is between the flexible circuit and the substrate and is mounted on a first surface of the flexible circuit such that the power stage is electrically connected to the power stage conductors. The package includes a die mounted on a second surface of the flexible circuit opposite the power stage. An output of the die is electrically connected to an input of the power stage via the control circuit conductors.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: August 1, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Woochan Kim, Vivek Kishorechand Arora
  • Publication number: 20230207420
    Abstract: An electronic device for use in power related applications includes a multi-layered substrate comprised of a first metal layer, a second metal layer, and an intermediate layer disposed between the first metal layer, and the second metal layer. The first metal layer is partitioned into sections, where each of the sections has a first surface and electrical circuits patterned onto the first surface. A lead frame is attached to outer portions of the first metal layer and a die is attached to the first surface of each of the sections of the first metal layer.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 29, 2023
    Inventors: Kwang-Soo Kim, Vivek Kishorechand Arora, Woochan Kim
  • Publication number: 20230198422
    Abstract: A power converter module includes power transistors and a substrate having a first surface and a second surface that opposes the first surface. A thermal pad is situated on the second surface of the substrate, and the thermal pad is configured to be thermally coupled to a heat sink. The power converter module also includes a control module mounted on a first surface of the substrate. The control module also includes control IC chips coupled to the power transistors. A first control IC chip controls a first switching level of the power converter module and a second control IC chip controls a second switching level of the power converter module. Shielding planes overlay the substrate. A first shielding plane is situated between the thermal pad and the first control IC chip and a second shielding plane is situated between the thermal pad and a second control IC chip.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 22, 2023
    Inventors: Woochan Kim, Vivek Kishorechand Arora, Makoto Shibuya, Kengo Aoya
  • Patent number: 11601065
    Abstract: A power converter module includes power transistors and a substrate having a first surface and a second surface that opposes the first surface. A thermal pad is situated on the second surface of the substrate, and the thermal pad is configured to be thermally coupled to a heat sink. The power converter module also includes a control module mounted on a first surface of the substrate. The control module also includes control IC chips coupled to the power transistors. A first control IC chip controls a first switching level of the power converter module and a second control IC chip controls a second switching level of the power converter module. Shielding planes overlay the substrate. A first shielding plane is situated between the thermal pad and the first control IC chip and a second shielding plane is situated between the thermal pad and a second control IC chip.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 7, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Woochan Kim, Vivek Kishorechand Arora, Makoto Shibuya, Kengo Aoya
  • Publication number: 20230060830
    Abstract: A power converter module includes power transistors and a substrate having a first surface and a second surface that opposes the first surface. A thermal pad is situated on the second surface of the substrate, and the thermal pad is configured to be thermally coupled to a heat sink. The power converter module also includes a control module mounted on a first surface of the substrate. The control module also includes control IC chips coupled to the power transistors. A first control IC chip controls a first switching level of the power converter module and a second control IC chip controls a second switching level of the power converter module. Shielding planes overlay the substrate. A first shielding plane is situated between the thermal pad and the first control IC chip and a second shielding plane is situated between the thermal pad and a second control IC chip.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Woochan Kim, Vivek Kishorechand Arora, Makoto Shibuya, Kengo Aoya
  • Publication number: 20230015323
    Abstract: A semiconductor package includes a leadframe including leads and a die attach pad (DAP) inside the leads, and at least one semiconductor die having a top side including circuitry electrically connected to bond pads and a bottom side attached to a bottom side portion of the DAP. The package includes a mold compound and a heat slug having a top side and a bottom side positioned within a cavity defined by sidewalls of the mold compound. The heat slug has an area greater than an area of the DAP is attached by its bottom side with a thermally conductive adhesive material to a top side portion of the DAP. Bondwires are between the leads and the bond pads. Exposed from the mold compound is a bottom side surfaces of the leads and the top side of the heat slug.
    Type: Application
    Filed: July 19, 2021
    Publication date: January 19, 2023
    Inventors: Woochan Kim, Vivek Kishorechand Arora
  • Publication number: 20220238424
    Abstract: A semiconductor package includes a metallic pad and leads, a semiconductor die attached to the metallic pad, the semiconductor die including an active side with bond pads opposite the metallic pad, a wire bond extending from a respective bond pad of the semiconductor die to a respective lead of the leads, a heat spreader over the active side of the semiconductor die with a gap separating the active side of the semiconductor die from the heat spreader, an electrically insulating material within the gap and in contact with the active side of the semiconductor die and the heat spreader; and mold compound covering the semiconductor die and the wire bond, and partially covering the metallic pad and the heat spreader, with the metallic pad exposed on a first outer surface of the semiconductor package and with the heat spreader exposed on a second outer surface of the semiconductor package.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Inventors: Anindya Poddar, Woochan Kim, Vivek Kishorechand Arora
  • Patent number: 11387179
    Abstract: An integrated circuit (IC) package includes a substrate having a first region and a second region. The substrate includes a conductive path between the first region and the second region. The IC package also includes a lead frame having a first member and a second member that are spaced apart. The IC package further includes a half-bridge power module. The half-bridge power module includes a capacitor having a first node coupled to the first member of the lead frame and a second node coupled to the second member of the lead frame. The half-bridge power module also includes a high side die having a high side field effect transistor (FET) embedded therein and a low side die having a low side FET embedded therein. A source of the high side FET is coupled to a drain of the low side FET through the conductive path of the substrate.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: July 12, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Makoto Shibuya, Kengo Aoya, Woochan Kim, Vivek Kishorechand Arora
  • Patent number: 11302615
    Abstract: A semiconductor package includes a metallic pad and leads, a semiconductor die attached to the metallic pad, the semiconductor die including an active side with bond pads opposite the metallic pad, a wire bond extending from a respective bond pad of the semiconductor die to a respective lead of the leads, a heat spreader over the active side of the semiconductor die with a gap separating the active side of the semiconductor die from the heat spreader, an electrically insulating material within the gap and in contact with the active side of the semiconductor die and the heat spreader; and mold compound covering the semiconductor die and the wire bond, and partially covering the metallic pad and the heat spreader, with the metallic pad exposed on a first outer surface of the semiconductor package and with the heat spreader exposed on a second outer surface of the semiconductor package.
    Type: Grant
    Filed: April 5, 2020
    Date of Patent: April 12, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anindya Poddar, Woochan Kim, Vivek Kishorechand Arora
  • Publication number: 20220108955
    Abstract: Packaged electronic devices and integrated circuits include a ceramic material or other thermally conductive, electrically insulating substrate with a patterned electrically conductive feature on a first side, and an electrically conductive layer on a second side. The IC further includes a semiconductor die mounted to the substrate, the semiconductor die including an electrically conductive contact structure, and an electronic component, with an electrically insulating lamination structure enclosing the semiconductor die, the frame and the thermal transfer structure. A redistribution layer with a conductive structure is electrically connected to the electrically conductive contact structure.
    Type: Application
    Filed: November 2, 2021
    Publication date: April 7, 2022
    Inventors: Woochan Kim, Mutsumi Masumoto, Kengo Aoya, Vivek Kishorechand Arora, Anindya Poddar
  • Publication number: 20220029519
    Abstract: A power conversion module includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module. The motherboard includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node and a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power module includes a first daughterboard mounted on the first surface of the motherboard and a second daughterboard mounted on the second surface of the motherboard.
    Type: Application
    Filed: May 12, 2021
    Publication date: January 27, 2022
    Inventors: Woochan Kim, Vivek Kishorechand Arora, David Ryan Huitink, Hayden Seth Carlton, Fang Luo, Asif Imran Emon