Abstract: Circuit for wake-up receivers are provide. In some embodiments, the wake-up receivers include self-mixers that receive a gate bias voltage. Some of the self-mixers are single ended and some are differential. In some embodiments, the wake-up receivers include a matching network that is connected to the input of the self-mixer. In some embodiments, the wake-up receivers include a low frequency path connected to the output of the self-mixer. In some embodiments, the wake-up receivers include a high frequency path connected to the output of the self-mixer. In some embodiments, the wake-up receivers are configured to receive an encoded bit stream. In some embodiments, the wake-up receivers are configured to wake-up another receiver.

Abstract: Circuit for wake-up receivers are provide. In some embodiments, the wake-up receivers include self-mixers that receive a gate bias voltage. Some of the self-mixers are single ended and some are differential. In some embodiments, the wake-up receivers include a matching network that is connected to the input of the self-mixer. In some embodiments, the wake-up receivers include a low frequency path connected to the output of the self-mixer. In some embodiments, the wake-up receivers include a high frequency path connected to the output of the self-mixer. In some embodiments, the wake-up receivers are configured to receive an encoded bit stream. In some embodiments, the wake-up receivers are configured to wake-up another receiver.

Abstract: Backscatter tags, comprising: antennas; single pole, multiple throw switches each switch (S) having pole terminal connected to one of the antennas, and each having first throw terminal (TT) connected to first side (FS) of inductor (I) for S, second TT connected to FS of capacitor (C) for S, third TT connected to fixed voltage level (FVL), fourth TT that is floating, wherein second side (SS) of I and SS of C are connected to the FVL; power combiner (PC) having inputs connected to fifth TT of each of two of the switches; power detector (PD) having an input connected to output of PC; analog to digital converter (ADC) having input connected to output of PD; hardware processor coupled to output of the ADC and coupled to control terminal of each of the switches.

Abstract: Backscatter tags, comprising: antennas; single pole, multiple throw switches each switch (S) having pole terminal connected to one of the antennas, and each having first throw terminal (TT) connected to first side (FS) of inductor (I) for S, second TT connected to FS of capacitor (C) for S, third TT connected to fixed voltage level (FVL), fourth TT that is floating, wherein second side (SS) of I and SS of C are connected to the FVL; power combiner (PC) having inputs connected to fifth TT of each of two of the switches; power detector (PD) having an input connected to output of PC; analog to digital converter (ADC) having input connected to output of PD; hardware processor coupled to output of the ADC and coupled to control terminal of each of the switches.

Abstract: Circuits for continuous-time analog correlators are provided, comprising: a first VCO that receives an input signal and that outputs a first pulse frequency modulated (PFM) output signal; a second VCO that receives a reference signal and that outputs a second PFM output signal; a first phase frequency detector (PFD) that receives the first PFM output signal and the second PFM output signal and that produces a first PFD output signal; a first delay cell that receives the first PFM output signal and that produces a first delayed signal (DS); a second delay cell that receives the second PFM output signal and that produces a second DS; a second PFD that receives the first DS and the second DS and that produces a second PFD output signal; and a capacitor-digital-to-analog converter (capacitor-DAC) that receives the first PFD output signal and the second PFD output signal and that produces a correlator output.

Abstract: Circuits for continuous-time analog correlators are provided, comprising: a first VCO that receives an input signal and that outputs a first pulse frequency modulated (PFM) output signal; a second VCO that receives a reference signal and that outputs a second PFM output signal; a first phase frequency detector (PFD) that receives the first PFM output signal and the second PFM output signal and that produces a first PFD output signal; a first delay cell that receives the first PFM output signal and that produces a first delayed signal (DS); a second delay cell that receives the second PFM output signal and that produces a second DS; a second PFD that receives the first DS and the second DS and that produces a second PFD output signal; and a capacitor-digital-to-analog converter (capacitor-DAC) that receives the first PFD output signal and the second PFD output signal and that produces a correlator output.