Patents by Inventor Vivek Pandey

Vivek Pandey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087233
    Abstract: An electronic device presents a virtual behavior of a participant in a Metaverse. The electronic device determines a context of the Metaverse including the people meeting with the participant. The electronic device determines a real-world behavior of the participant while immersed in the Metaverse. The electronic device generates virtual behavior of the participant based on the context of the Metaverse and the real-world behavior of the participant while immersed in the Metaverse. The electronic device renders an avatar of the participant having the virtual behavior of the participant.
    Type: Application
    Filed: October 5, 2023
    Publication date: March 14, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ranjan Kumar SAMAL, Vivek Paul JOSEPH, Rajin BABU, Abhishek PANDEY, Nagaraj ADIGA, Somesh NANDA
  • Publication number: 20240070736
    Abstract: A computerized analysis system for automated anomaly identification is configured to operate at a large scale by retrieving claimline data for a period of time from an input data store. The claimline data includes a plurality of billing codes and prices of the plurality of billing codes. The computerized analysis system is further configured to determine a set of changepoints in the plurality of billing codes in the claimline data and to determine a parameter based on the set of changepoints. The computerized analysis system is also configured to identify a chargemaster increase in response to the parameter exceeding a threshold. In response to identification of the chargemaster increase, the computerized analysis system is configured to publish an alert that indicates occurrence of the chargemaster increase.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Joseph Bentivegna, Itzchak J. Palka, Eetai Ben-Sasson, Vivek Pandey
  • Patent number: 11810165
    Abstract: A computerized analysis system includes a data retrieval module, a spike filter module, a chargemaster analysis module, and an alert module. The data retrieval module is configured to retrieve claimline data for a period of time from an input data store. The claimline data includes billing codes and prices of the billing codes associated with a provider. The spike filter module is configured to flag and filter price spikes in the claimline data. The chargemaster analysis module is configured to determine whether a changepoint exists in the billing codes in the claimline data. The chargemaster analysis module is configured to identify a chargemaster increase for the provider in response to a statistical parameter of changepoints exceeding a threshold. The alert module is configured to, in response to identification of a chargemaster increase, publish an alert that a chargemaster increase has occurred for the provider.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: November 7, 2023
    Assignee: Cigna Intellectual Property, Inc.
    Inventors: Joseph Bentivegna, Itzchak J. Palka, Eetai Ben-Sasson, Vivek Pandey
  • Patent number: 11810164
    Abstract: An analysis system includes a data retrieval module that retrieves claimline data for a period of time. The claimline data includes multiple billing codes and corresponding prices associated with a provider. An analysis module receives the claimline data from the data retrieval module, determines whether a changepoint exists in the billing codes in the claimline data, determines a statistical parameter of changepoints per day during the period of time, and identifies a chargemaster increase for the provider in response to the statistical parameter of changepoints exceeding a threshold. An alert module, in response to identification of a chargemaster increase, publishes an alert that a chargemaster increase has occurred. The alert includes the provider's identification, a chargemaster increase date, a claimline number, a changepoint number, the billing code identification, or a price of the billing code at the changepoint. The alert transforms a user interface displayed to a user.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: November 7, 2023
    Assignee: Cigna Intellectual Property, Inc.
    Inventors: Joseph Bentivegna, Itzchak J. Palka, Eetai Ben-Sasson, Vivek Pandey
  • Publication number: 20230274933
    Abstract: Methods for transferring graphene to substrates include at least a method for transferring a graphene-metal bilayer to a substrate to form a laminate thereof. The method can include applying a first continuous polymer layer to a graphene layer of the graphene-metal bilayer; applying a first discontinuous polymer layer to the first continuous polymer layer; applying a second continuous polymer layer to a metal layer of the graphene-metal bilayer; applying a second discontinuous polymer layer to the second continuous polymer layer; etching the first continuous polymer layer with a first etchant through the first discontinuous polymer layer; laminating the substrate by pressing the face of the graphene layer into a surface of the substrate; etching the second continuous polymer layer with a second etchant through the second discontinuous polymer layer, thereby transferring the graphene-metal bilayer to the substrate to form the laminate.
    Type: Application
    Filed: February 21, 2023
    Publication date: August 31, 2023
    Inventors: Vivek Pandey, Leandro Forciniti
  • Patent number: 11472089
    Abstract: A mixing element for an extruder screw having a width extending in an x-direction of an x-y-z coordinate system, a length extending in a y-direction, and a thickness extending in a z-direction. The mixing element includes a base defining a passage extending along an axis in the y-direction for receiving the extruder screw. Projections extend radially outward from the base and define channels therebetween. The width and the depth of each channel vary along the length of the channel.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: October 18, 2022
    Assignee: CASE WESTERN RESERVE UNIVERSITY
    Inventors: Vivek Pandey, Sidney Carson, Joao Maia
  • Publication number: 20190337214
    Abstract: A mixing element for an extruder screw having a width extending in an x-direction of an x-y-z coordinate system, a length extending in a y-direction, and a thickness extending in a z-direction. The mixing element includes a base defining a passage extending along an axis in the y-direction for receiving the extruder screw. Projections extend radially outward from the base and define channels therebetween. The width and the depth of each channel vary along the length of the channel.
    Type: Application
    Filed: May 6, 2019
    Publication date: November 7, 2019
    Inventors: Vivek Pandey, Sidney Carson, Joao Maia
  • Patent number: 9116829
    Abstract: The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: August 25, 2015
    Assignee: VMware, Inc.
    Inventors: Qasim Ali, Vivek Pandey, Raviprasad Mummidi, Kiran Tati
  • Publication number: 20140317375
    Abstract: The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization.
    Type: Application
    Filed: July 1, 2014
    Publication date: October 23, 2014
    Inventors: Qasim ALI, Vivek PANDEY, Raviprasad MUMMIDI, Kiran TATI
  • Patent number: 8769184
    Abstract: The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: July 1, 2014
    Assignee: VMware, Inc.
    Inventors: Qasim Ali, Ravisprasad Mummidi, Vivek Pandey, Kiran Tati
  • Patent number: 8719545
    Abstract: A system and related method of operation for migrating the memory of a virtual machine from one NUMA node to another. Once the VM is migrated to a new node, migration of memory pages is performed while giving priority to the most utilized pages, so that access to these pages becomes local as soon as possible. Various heuristics are described to enable different implementations for different situations or scenarios.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: May 6, 2014
    Assignee: VMware, Inc.
    Inventors: Vivek Pandey, Ole Agesen, Alexander Thomas Garthwaite, Carl A. Waldspurger, Rajesh Venkatasubramanian
  • Patent number: 8364932
    Abstract: The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: January 29, 2013
    Assignee: VMware, Inc.
    Inventors: Qasim Ali, Raviprasad Mummidi, Vivek Pandey, Kiran Tati
  • Patent number: 8307192
    Abstract: A system and related method of operation for migrating the memory of a virtual machine from one NUMA node to another. Once the VM is migrated to a new node, migration of memory pages is performed while giving priority to the most utilized pages, so that access to these pages becomes local as soon as possible. Various heuristics are described to enable different implementations for different situations or scenarios.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: November 6, 2012
    Assignee: VMware, Inc.
    Inventors: Vivek Pandey, Ole Agesen, Alexander Thomas Garthwaite, Carl A. Waldspurger, Rajesh Venkatasubramanian
  • Publication number: 20120110236
    Abstract: The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 3, 2012
    Applicant: VMWARE, INC.
    Inventors: Qasim ALI, Raviprasad MUMMIDI, Vivek PANDEY, Kiran TATI
  • Publication number: 20120030407
    Abstract: A system and related method of operation for migrating the memory of a virtual machine from one NUMA node to another. Once the VM is migrated to a new node, migration of memory pages is performed while giving priority to the most utilized pages, so that access to these pages becomes local as soon as possible. Various heuristics are described to enable different implementations for different situations or scenarios.
    Type: Application
    Filed: October 11, 2011
    Publication date: February 2, 2012
    Applicant: VMWARE, INC.
    Inventors: Vivek PANDEY, Ole AGESEN, Alex GARTHWAITE, Carl WALDSPURGER, Rajesh VENKATASUBRAMANIAN
  • Patent number: 8037280
    Abstract: A system and related method of operation for migrating the memory of a virtual machine from one NUMA node to another. Once the VM is migrated to a new node, migration of memory pages is performed while giving priority to the most utilized pages, so that access to these pages becomes local as soon as possible. Various heuristics are described to enable different implementations for different situations or scenarios.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: October 11, 2011
    Assignee: VMware, Inc.
    Inventors: Vivek Pandey, Ole Agesen, Alex Garthwaite, Carl Waldspurger, Rajesh Venkatasubramanian
  • Patent number: 7895427
    Abstract: A method and system for executing a software application having a binary size that is larger than an available memory space in an embedded system from which the software application will execute. The software application is split into one or more initialization sequences and a main code sequence. The method includes loading (302) each initialization sequence of the one or more initialization sequences in the memory space prior to its execution, and executing (304) each initialization sequence of the one or more initialization sequences out of the memory space. Further, the method includes loading (306) the main code sequence in the memory space after the execution of the one or more initialization codes and then executing (308) the main code sequence out of the memory space.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: February 22, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Rajesh Kumar Sinha, Vivek Pandey
  • Patent number: 7702641
    Abstract: The embodiments of the present invention provide a method for comparing file tree descriptions and generating a sequenced log of changes that transform an old file tree to a new file tree. According to one embodiment, the inputs to this comparator are two tree-structured descriptions called file tree indices, and the outputs are a sequence of file tree operations that can transform the old tree to the current tree. According to another embodiment, the comparator has two top level steps, where at step one it recursively goes through the old file tree index and compares each folder along with its children with that of the corresponding file tree generating a raw operation log, and at step two after the recursion is done, the comparator processes the raw operation log and optimizes certain sets of operations by transforming them into single operations.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: April 20, 2010
    Assignee: Oracle America, Inc.
    Inventors: Brian Holtz, Vijay Balasubramanian, Nidheesh Dubey, Aseem Sharma, Vivek Pandey
  • Publication number: 20090313445
    Abstract: A system and related method of operation for migrating the memory of a virtual machine from one NUMA node to another. Once the VM is migrated to a new node, migration of memory pages is performed while giving priority to the most utilized pages, so that access to these pages becomes local as soon as possible. Various heuristics are described to enable different implementations for different situations or scenarios.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 17, 2009
    Applicant: VMWARE, INC.
    Inventors: Vivek Pandey, Ole Agesen, Alex Garthwaite, Carl Waldspurger, Rajesh Venkatasubramanian
  • Publication number: 20080077787
    Abstract: A method and system for executing a software application having a binary size that is larger than an available memory space in an embedded system from which the software application will execute. The software application is split into one or more initialization sequences and a main code sequence. The method includes loading (302) each initialization sequence of the one or more initialization sequences in the memory space prior to its execution, and executing (304) each initialization sequence of the one or more initialization sequences out of the memory space. Further, the method includes loading (306) the main code sequence in the memory space after the execution of the one or more initialization codes and then executing (308) the main code sequence out of the memory space.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 27, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Rajesh Kumar SINHA, Vivek Pandey