Patents by Inventor Vivek Saraswat

Vivek Saraswat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11323065
    Abstract: Accordingly the embodiments herein provide a method for fabricating a neuron oscillator (200a). The neuron oscillator (200a) includes a thermal insulating device connected with a resistor and a capacitor in series to produce self-sustained oscillations, where the resistor and the capacitor are arranged in parallel manner. The neuron oscillator (200a) eliminates a requirement of an additional compensation circuitry for a consistent performance over a time under heating issues. Additionally, an ON/OFF ratio of the neuron oscillator (200a) improves to a broader resistor range. Further, a presence of tunable synaptic memristor functionality of the neuron oscillator (200a) provides a reduced fabrication complexity to a large scale ONN. An input voltage required for the neuron oscillator (200a) is low (2-3 V) which makes it suitable to use with existing circuitries without using any additional converters.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: May 3, 2022
    Assignee: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
    Inventors: Sandip Gangadharrao Lashkare, Vivek Saraswat, Pankaj Subhash Kumbhare, Udayan Ganguly
  • Publication number: 20210242831
    Abstract: Accordingly the embodiments herein provide a method for fabricating a neuron oscillator (200a). The neuron oscillator (200a) includes a thermal insulating device connected with a resistor and a capacitor in series to produce self-sustained oscillations, where the resistor and the capacitor are arranged in parallel manner. The neuron oscillator (200a) eliminates a requirement of an additional compensation circuitry for a consistent performance over a time under heating issues. Additionally, an ON/OFF ratio of the neuron oscillator (200a) improves to a broader resistor range. Further, a presence of tunable synaptic memristor functionality of the neuron oscillator (200a) provides a reduced fabrication complexity to a large scale ONN. An input voltage required for the neuron oscillator (200a) is low (2-3 V) which makes it suitable to use with existing circuitries without using any additional converters.
    Type: Application
    Filed: May 28, 2019
    Publication date: August 5, 2021
    Inventors: Sandip Gangadharrao Lashkare, Vivek Saraswat, Pankaj Subhash Kumbhare, Udayan Ganguly
  • Patent number: 9911875
    Abstract: An interdigitated back contact solar cell is provided. The solar cell comprises a solar cell substrate having a light receiving frontside and a backside comprising base and emitter regions. A first level metal (M1) layer is positioned on the substrate backside contacting the base and emitter regions. A second level metal (M2) layer is connected to the first level metal (M1) layer and comprises a base busbar and an emitter busbar. The first level metal comprises substantially orthogonal interdigitated metallization and substantially parallel interdigitated metallization positioned under and corresponding to the base and emitter busbars on the second level metal (M2). The substantially parallel interdigitated metallization of M1 collects carriers of opposite polarity of the corresponding busbar.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: March 6, 2018
    Assignee: Beamreach-Solexel Assets LLC
    Inventors: Swaroop Kommera, Pawan Kapur, Yen-Sheng Su, Vivek Saraswat, Anand Deshpande, Mehrdad M. Moslehi
  • Publication number: 20170005206
    Abstract: Various laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional.
    Type: Application
    Filed: January 8, 2016
    Publication date: January 5, 2017
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan, Vivek Saraswat
  • Patent number: 9236510
    Abstract: A method for making an ablated electrically insulating layer on a semiconductor substrate. A first relatively thin layer of at least an undoped glass or undoped oxide is deposited on a surface of a semiconductor substrate having n-type doping. A first relatively thin semiconductor layer having at least one substance chosen from amorphous semiconductor, nanocrystalline semiconductor, microcrystalline semiconductor, or polycrystalline semiconductor is deposited on the relatively thin layer of at least an undoped glass or undoped oxide. At least a layer of borosilicate glass or borosilicate/undoped glass stack is deposited on the relatively thin semiconductor layer. The at least borosilicate glass or borosilicate/undoped glass stack is selectively ablated with a pulsed laser, and the relatively thin semiconductor layer substantially protects the semiconductor substrate from the pulsed laser.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: January 12, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan, Vivek Saraswat
  • Publication number: 20150140721
    Abstract: Various laser processing schemes are disclosed for producing various types of hetero junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional.
    Type: Application
    Filed: December 20, 2013
    Publication date: May 21, 2015
    Applicant: SOLEXEL, INC.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan, Vivek Saraswat
  • Publication number: 20150068592
    Abstract: An interdigitated back contact solar cell is provided. The solar cell comprises a solar cell substrate having a light receiving frontside and a backside comprising base and emitter regions. A first level metal (M1) layer is positioned on the substrate backside contacting the base and emitter regions. A second level metal (M2) layer is connected to the first level metal (M1) layer and comprises a base busbar and an emitter busbar. The first level metal comprises substantially orthogonal interdigitated metallization and substantially parallel interdigitated metallization positioned under and corresponding to the base and emitter busbars on the second level metal (M2). The substantially parallel interdigitated metallization of M1 collects carriers of opposite polarity of the corresponding busbar.
    Type: Application
    Filed: April 23, 2014
    Publication date: March 12, 2015
    Applicant: Solexel, Inc.
    Inventors: Swaroop Kommera, Pawan Kapur, Yen-Sheng Su, Vivek Saraswat, Anand Deshpande, Mehrdad M. Moslehi
  • Patent number: 8637340
    Abstract: Various laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: January 28, 2014
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan, Vivek Saraswat
  • Publication number: 20130130430
    Abstract: Various laser processing schemes are disclosed for producing various types of hetero-junction emitter and homo-junction emitter solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional.
    Type: Application
    Filed: May 21, 2012
    Publication date: May 23, 2013
    Applicant: SOLEXEL, INC.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan, Heather Deshazer, Vivek Saraswat, Pawan Kapur
  • Publication number: 20120171804
    Abstract: Various laser processing schemes are disclosed for producing various types of hetero junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 5, 2012
    Applicant: SOLEXEL, INC.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan, Vivek Saraswat