Patents by Inventor Vivek Seshadri

Vivek Seshadri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10592252
    Abstract: Efficient instruction processing for sparse data includes extensions to a processor pipeline to identify zero-optimizable instructions that include at least one zero input operand, and bypass the execute stage of the processor pipeline, determining the result of the operation without executing the instruction. When possible, the extensions also bypass the writeback stage of the processor pipeline.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: March 17, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Trishul A. Chilimbi, Olatunji Ruwase, Vivek Seshadri
  • Publication number: 20190362227
    Abstract: Layers of a deep neural network (DNN) are partitioned into stages using a profile of the DNN. Each of the stages includes one or more of the layers of the DNN. The partitioning of the layers of the DNN into stages is optimized in various ways including optimizing the partitioning to minimize training time, to minimize data communication between worker computing devices used to train the DNN, or to ensure that the worker computing devices perform an approximately equal amount of the processing for training the DNN. The stages are assigned to the worker computing devices. The worker computing devices process batches of training data using a scheduling policy that causes the workers to alternate between forward processing of the batches of the DNN training data and backward processing of the batches of the DNN training data. The stages can be configured for model parallel processing or data parallel processing.
    Type: Application
    Filed: June 29, 2018
    Publication date: November 28, 2019
    Inventors: Vivek SESHADRI, Amar PHANISHAYEE, Deepak NARAYANAN, Aaron HARLAP, Nikhil Devanur RANGARAJAN
  • Patent number: 10459727
    Abstract: Loop code processor optimizations are implemented as a loop optimizer extension to a processor pipeline. The loop optimizer generates optimized code associated with code loops that include at least one zero-optimizable instruction. The loop optimizer may generate multiple versions of optimized code associated with a particular code loop, where each of the multiple version of optimized code has a different associated condition under which the optimized code can be safely executed.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: October 29, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Trishul A Chilimbi, Olatunji Ruwase, Vivek Seshadri
  • Publication number: 20170192896
    Abstract: A zero cache memory system extension includes a zero cache to store cache tags associated with zero cache lines, while a corresponding data cache stores cache tags and data bytes associated with non-zero cache lines. As non-zero data is written to the cache, cache lines may be moved from the zero cache to the data cache. Similarly, as zero data is written to the cache, cache lines may be moved from the data cache to the zero cache.
    Type: Application
    Filed: December 31, 2015
    Publication date: July 6, 2017
    Inventors: Trishul A Chilimbi, Olatunji Ruwase, Vivek Seshadri
  • Publication number: 20170192793
    Abstract: Efficient instruction processing for sparse data includes extensions to a processor pipeline to identify zero-optimizable instructions that include at least one zero input operand, and bypass the execute stage of the processor pipeline, determining the result of the operation without executing the instruction. When possible, the extensions also bypass the writeback stage of the processor pipeline.
    Type: Application
    Filed: December 31, 2015
    Publication date: July 6, 2017
    Inventors: Trishul A. Chilimbi, Olatunji Ruwase, Vivek Seshadri
  • Publication number: 20170192787
    Abstract: Loop code processor optimizations are implemented as a loop optimizer extension to a processor pipeline. The loop optimizer generates optimized code associated with code loops that include at least one zero-optimizable instruction. The loop optimizer may generate multiple versions of optimized code associated with a particular code loop, where each of the multiple version of optimized code has a different associated condition under which the optimized code can be safely executed.
    Type: Application
    Filed: December 31, 2015
    Publication date: July 6, 2017
    Inventors: Trishul A. Chilimbi, Olatunji Ruwase, Vivek Seshadri
  • Patent number: 8660295
    Abstract: Methods and systems for watermarking of digital images are presented. In one aspect, a method of embedding information in a digital image includes transforming the digital image to a set of coefficient blocks having coefficients in a frequency domain, embedding a watermark-indicator in one or more of the coefficient blocks, and embedding a watermark in one or more watermark blocks that have a predetermined number of coefficient blocks. The embedded watermark is substantially invisible in the output watermarked digital image. Another aspect is a method of extracting a watermark from a digital image that includes transforming a digital image to a coefficient matrix, determining if the digital image is watermarked based on a predetermined watermark-indicator, and retrieving a watermark from a projected watermark block of a projected watermark block distribution.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: February 25, 2014
    Assignee: Google Inc.
    Inventors: Vivek Seshadri, Kiran Singh Panesar, Ranveer Kunal
  • Publication number: 20120093356
    Abstract: Methods and systems for watermarking of digital images are presented. In one aspect, a method of embedding information in a digital image includes transforming the digital image to a set of coefficient blocks having coefficients in a frequency domain, embedding a watermark-indicator in one or more of the coefficient blocks, and embedding a watermark in one or more watermark blocks that have a predetermined number of coefficient blocks. The embedded watermark is substantially invisible in the output watermarked digital image. Another aspect is a method of extracting a watermark from a digital image that includes transforming a digital image to a coefficient matrix, determining if the digital image is watermarked based on a predetermined watermark-indicator, and retrieving a watermark from a projected watermark block of a projected watermark block distribution.
    Type: Application
    Filed: December 27, 2011
    Publication date: April 19, 2012
    Applicant: Google Inc.
    Inventors: Vivek SESHADRI, Kiran Singh PANESAR, Ranveer KUNAL
  • Patent number: 8090146
    Abstract: Methods and systems for watermarking of digital images are presented. In one aspect, a method of embedding information in a digital image includes transforming the digital image to a set of coefficient blocks having coefficients in a frequency domain, embedding a watermark-indicator in one or more of the coefficient blocks, and embedding a watermark in one or more watermark blocks that have a predetermined number of coefficient blocks. The embedded watermark is substantially invisible in the output watermarked digital image. Another aspect is a method of extracting a watermark from a digital image that includes transforming a digital image to a coefficient matrix, determining if the digital image is watermarked based on a predetermined watermark-indicator, and retrieving a watermark from a projected watermark block of a projected watermark block distribution.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: January 3, 2012
    Assignee: Google Inc.
    Inventors: Vivek Seshadri, Kiran Singh Panesar, Ranveer Kunal
  • Publication number: 20100177977
    Abstract: Methods and systems for watermarking of digital images are presented. In one aspect, a method of embedding information in a digital image includes transforming the digital image to a set of coefficient blocks having coefficients in a frequency domain, embedding a watermark-indicator in one or more of the coefficient blocks, and embedding a watermark in one or more watermark blocks that have a predetermined number of coefficient blocks. The embedded watermark is substantially invisible in the output watermarked digital image. Another aspect is a method of extracting a watermark from a digital image that includes transforming a digital image to a coefficient matrix, determining if the digital image is watermarked based on a predetermined watermark-indicator, and retrieving a watermark from a projected watermark block of a projected watermark block distribution.
    Type: Application
    Filed: January 15, 2009
    Publication date: July 15, 2010
    Applicant: Google Inc.
    Inventors: Vivek Seshadri, Kiran Singh Panesar, Ranveer Kunal