Patents by Inventor Vivian Ng

Vivian Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6962850
    Abstract: Devices with embedded silicon or germanium nanocrystals, fabricated using ion implantation, exhibit superior data-retention characteristics relative to conventional floating-gate devices. However, the prior art use of ion implantation for their manufacture introduces several problems. These have been overcome by initial use of rapid thermal oxidation to grow a high quality layer of thin tunnel oxide. Chemical vapor deposition is then used to deposit a germanium doped oxide layer. A capping oxide is then deposited following which the structure is rapid thermally annealed to synthesize the germanium nanocrystals.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: November 8, 2005
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Vincent Ho, Wee Kiong Choi, Lap Chan, Wai Kin Chim, Vivian Ng, Cheng Lin Heng, Lee Wee Teo
  • Publication number: 20050074939
    Abstract: Devices with embedded silicon or germanium nanocrystals, fabricated using ion implantation, exhibit superior data-retention characteristics relative to conventional floating-gate devices. However, the prior art use of ion implantation for their manufacture introduces several problems. These have been overcome by initial use of rapid thermal oxidation to grow a high quality layer of thin tunnel oxide. Chemical vapor deposition is then used to deposit a germanium doped oxide layer. A capping oxide is then deposited following which the structure is rapid thermally annealed to synthesize the germanium nanocrystals.
    Type: Application
    Filed: October 1, 2003
    Publication date: April 7, 2005
    Inventors: Vincent Ho, Wee Choi, Lap Chan, Wai Chim, Vivian Ng, Cheng Heng, Lee Teo
  • Patent number: 6656792
    Abstract: A Flash memory is provided having a trilayer structure of rapid thermal oxide/germanium (Ge) nanocrystals in silicon dioxide (SiO2)/sputtered SiO2 cap with demonstrated via capacitance versus voltage (C-V) measurements having memory hysteresis due to Ge nanocrystals in the middle layer of the trilayer structure. The Ge nanocrystals are synthesized by rapid thermal annealing of a co-sputtered Ge+SiO2 layer.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: December 2, 2003
    Assignee: Chartered Semiconductor Manufacturing LTD
    Inventors: Wee Kiong Choi, Wai Kin Chim, Vivian Ng, Lap Chan
  • Publication number: 20030077863
    Abstract: A Flash memory is provided having a trilayer structure of rapid thermal oxide/germanium (Ge) nanocrystals in silicon dioxide (SiO2)/sputtered SiO2 cap with demonstrated via capacitance versus voltage (C-V) measurements having memory hysteresis due to Ge nanocrystals in the middle layer of the trilayer structure. The Ge nanocrystals are synthesized by rapid thermal annealing of a co-sputtered Ge+SiO2 layer.
    Type: Application
    Filed: March 1, 2002
    Publication date: April 24, 2003
    Inventors: Wee Kiong Choi, Wai Kin Chim, Vivian Ng, Lap Chan