Patents by Inventor Vivien BOUSSARD

Vivien BOUSSARD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and systems for bit error determination and correction
    Patent number: 11784664
    Abstract: A computer-implemented technique for correcting a data packet having a payload and cyclic redundancy check information provides a list of possible packet errors by algorithmic operations of forcing and cancelling bits at certain positions using a generator polynomial, while maintaining the equivalence relationship with the original syndrome, performed explicitly using arithmetic operations or implicitly using a table representative of such arithmetic operations. Correction can then be implemented using an error chosen from the list.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: October 10, 2023
    Inventors: Vivien Boussard, Stéphane Coulombe
  • METHODS AND SYSTEMS FOR BIT ERROR DETERMINATION AND CORRECTION
    Publication number: 20220045696
    Abstract: A computer-implemented technique for correcting a data packet having a payload and cyclic redundancy check information provides a list of possible packet errors by algorithmic operations of forcing and cancelling bits at certain positions using a generator polynomial, while maintaining the equivalence relationship with the original syndrome, performed explicitly using arithmetic operations or implicitly using a table representative of such arithmetic operations. Correction can then be implemented using an error chosen from the list.
    Type: Application
    Filed: October 15, 2021
    Publication date: February 10, 2022
    Inventors: Vivien BOUSSARD, Stéphane COULOMBE