Abstract: A process for transferring a useful layer to a receiver substrate includes providing a donor substrate comprising an intermediate layer, a carrier substrate, and a useful layer. The intermediate layer is free of species liable to degas during a subsequent heat treatment, and is configured to become soft at a temperature. The receiver substrate and the donor substrate are assembled. An additional layer is provided between the receiver substrate and the carrier substrate that comprises chemical species that are susceptible to diffuse into the intermediate layer during the subsequent heat treatment so as to form a weak zone. The heat treatment is carried out on the receiver substrate and the donor substrate at a second temperature higher than the first temperature.

Abstract: A process for transferring a useful layer to a receiver substrate includes providing a donor substrate comprising an intermediate layer, a carrier substrate, and a useful layer. The intermediate layer is free of species liable to degas during a subsequent heat treatment, and is configured to become soft at a temperature. The receiver substrate and the donor substrate are assembled. An additional layer is provided between the receiver substrate and the carrier substrate that comprises chemical species that are susceptible to diffuse into the intermediate layer during the subsequent heat treatment so as to form a weak zone. The heat treatment is carried out on the receiver substrate and the donor substrate at a second temperature higher than the first temperature.

Abstract: The invention provides methods for reducing trap densities at interfaces in a multilayer semiconductor wafer, specifically trap densities between an active layer and an insulating layer under the active layer. The methods comprise exposing wafers to high temperatures in a generally neutral atmosphere that also comprises one or more species that can, or whose ions can, migrate into the wafer down to the interface where reduction of the trap density is desired.

Abstract: The invention provides methods for applying high temperature treatments to semiconductor wafers that limit surface tearing-off defects and surface particle contamination. In preferred embodiments, the high temperature treatments begin at boat-in temperatures of less than about 550° C. and include a first temperature ramp-up to the HT treatment temperatures at rates of 6° C./min or less. These methods are advantageously applied to semiconductor wafers comprising layers of different thermal properties, and in particular to semiconductor wafers comprising silicon-on-insulator structures.

Abstract: A method for annealing a multilayer wafer by subjecting the wafer to a high temperature treatment that includes at least a temperature ramp-up between a boat-in temperature and a process of at least 800° C.; at least a processing phase in the range conduct at or above the process temperature; and a temperature ramp-down from the processing phase to a boat-out temperature. The boat-in temperature is sufficiently lower than the boat-out temperature to reduce or avoid tearing-off defects on the wafer and to reduce particle contaminants on the wafer, as well as to reduce or avoid degrading wafer Dit compared to an annealing method where the boat-in and boat-out temperatures are closer in temperature.

Abstract: A method for annealing a multilayer wafer by subjecting the wafer to a high temperature treatment that includes at least a temperature ramp-up between a boat-in temperature and a process of at least 800° C.; at least a processing phase in the range conduct at or above the process temperature; and a temperature ramp-down from the processing phase to a boat-out temperature. The boat-in temperature is sufficiently lower than the boat-out temperature to reduce or avoid tearing-off defects on the wafer and to reduce particle contaminants on the wafer, as well as to reduce or avoid degrading wafer Dit compared to an annealing method where the boat-in and boat-out temperatures are closer in temperature.

Abstract: The invention provides methods for applying high temperature treatments to semiconductor wafers that limit surface tearing-off defects and surface particle contamination. In preferred embodiments, the high temperature treatments begin at boat-in temperatures of less than about 550° C. and include a first temperature ramp-up to the HT treatment temperatures at rates of 6° C./min or less. These methods are advantageously applied to semiconductor wafers comprising layers of different thermal properties, and in particular to semiconductor wafers comprising silicon-on-insulator structures.

Abstract: The invention provides methods for reducing trap densities at interfaces in a multilayer semiconductor wafer, specifically trap densities between an active layer and an insulating layer under the active layer. The methods comprise exposing wafers to high temperatures in a generally neutral atmosphere that also comprises one or more species that can, or whose ions can, migrate into the wafer down to the interface where reduction of the trap density is desired.