Patents by Inventor Vlad Goldman

Vlad Goldman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for power reduction and a device having power reduction capabilities
    Patent number: 8432209
    Abstract: A device that includes a dual edge triggered flip-flop that has state retention capabilities, the dual edge triggered flip-flop includes: a retention latch that includes a first inverter, a second inverter and a first transfer gate; wherein the first and second inverters receive power during a power gating period; a second latch that includes a third inverter, a fourth inverter and a second transfer gate; wherein the third and fourth inverters are powered down during a power gating period; a third transfer gate that is coupled between input nodes of the retention latch and the second latch; wherein the third transfer gate is opened during the power gating period; wherein the first transfer gate is controlled by a control signal and the second transfer gate is controlled by an inverted control signal; wherein the retention latch stores, at the end of the power gating period a retention value; wherein the retention value is selected, in response to a value of the control signal when the power gating period star
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: April 30, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Sergey Sofer, Vlad Goldman, Noam Sivan
  • Integrated circuit and a method for recovering from a low-power period
    Patent number: 8089259
    Abstract: A system that has low power recovery capabilities, the system includes: a switch that is adapted to provide a gated power supply to a power gated circuit in response to a control current; and a control signal generator adapted to control an intensity of the control current in response to a reception of a low power period end indicator, a value of the continuous supply voltage at a port of the control signal generator, a value of the gated supply voltage and an output signal of a high switching point buffer that is inputted by the gated supply voltage.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: January 3, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Sergey Sofer, Vlad Goldman, Dov Tzytkin
  • INTEGRATED CIRCUIT AND A METHOD FOR RECOVERING FROM A LOW-POWER PERIOD
    Publication number: 20100109633
    Abstract: A system that has low power recovery capabilities, the system includes: a switch that is adapted to provide a gated power supply to a power gated circuit in response to a control current; and a control signal generator adapted to control an intensity of the control current in response to a reception of a low power period end indicator, a value of the continuous supply voltage at a port of the control signal generator, a value of the gated supply voltage and an output signal of a high switching point buffer that is inputted by the gated supply voltage.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 6, 2010
    Inventors: Sergey SOFER, Vlad GOLDMAN, Dov TZYTKIN