Patents by Inventor Vladan Andrijanic

Vladan Andrijanic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180278948
    Abstract: Example video encoding techniques are described. A video encoder may generate residual data for macroblocks for tiles of a current frame. Each tile includes a plurality of macroblocks, each tile is independently encoded from the other tiles of the current frame, and a width of each tile is less than a width of the current frame. The video encoder may store the residual data in buffers. Each buffer is associated with one or more tiles, and each buffer is configured to store residual data for macroblocks for the one or more tiles with which each buffer is associated. The video encoder may read the residual data from the plurality of buffers for macroblocks of an entire row of the current frame before reading residual data from the plurality of buffers for macroblocks of any other row of the current frame, and encode values based on the read residual data.
    Type: Application
    Filed: March 23, 2017
    Publication date: September 27, 2018
    Inventors: Yasutomo Matsuba, Hariharan Ganesh Lalgudi, Yunqing Chen, Vladan Andrijanic, Shyamprasad Chikkerur, Harikrishna Reddy, Kai Wang
  • Patent number: 9877033
    Abstract: This disclosure describes techniques in which the decoding order of video blocks is modified relative to the display order of video blocks. The decoding order may be modified temporally such that video blocks of different video frames (or other coded units) are decoded in an alternating manner. In this case, the decoding order of video blocks may alternate between video blocks of two or more different frames. Furthermore, the decoding order may also be modified spatially within a given video block such that the video blocks are decoded in an order that does not correspond to the raster scan order of the video blocks. The techniques may improve the use of memory by improving the likelihood of cache hits, thereby reducing the number of memory loads from an external memory to an internal cache associated with the decoder.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: January 23, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Vladan Andrijanic, Serag GadelRab
  • Publication number: 20170228252
    Abstract: Various embodiments of methods and systems for managing compressed data transaction sizes in a system on a chip (“SoC”) in a portable computing device (“PCD”) are disclosed. Based on lengths of compressed data tiles associated in a group, wherein the compressed data tiles are comprised within a compressed image file, multiple compressed data tiles may be aggregated into a single, multi-tile transaction. A metadata file may be generated in association with the single multi-tile transaction to identify the transaction as a multi-tile transaction and provide offset data to distinguish data associated with the compressed data tiles. Using the metadata, embodiments of the solution may provide for random access and modification of the compressed data stored in association with a multi-tile transaction.
    Type: Application
    Filed: January 13, 2017
    Publication date: August 10, 2017
    Inventors: SERAG GADELRAB, MEGHAL VARIA, WISNU WURJANTARA, CLARA KA WAH SUNG, MARK STERNBERG, VLADAN ANDRIJANIC, ANTONIO RINALDI, VINOD CHAMARTY, POOJA SINHA, TAO WANG, ANDREW GRUBER
  • Patent number: 8989275
    Abstract: A method for video processing may include receiving video data units, and compressing the video data units to generate compressed video data units that have a variable size. The method may also include storing the compressed video data units contiguously in a memory in memory segments that have a fixed size, where the size of at least one of the compressed video data units is indivisible by the fixed size of the memory segments, and where a portion of the indivisible compressed video data unit is stored with a portion of another compressed video data unit in one of the memory segments. The method may also include determining data storage information associated with the compressed video data units, and storing the data storage information in the memory. A system may have a video processing architecture designed to support the method.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: March 24, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Chia-Yuan Teng, Dan M. Chuang, Gokce Dane, Raghavendra C. Nagaraj, Vladan Andrijanic, Yiu-Wing Leung
  • Publication number: 20120114045
    Abstract: A method for video processing may include receiving video data units, and compressing the video data units to generate compressed video data units that have a variable size. The method may also include storing the compressed video data units contiguously in a memory in memory segments that have a fixed size, where the size of at least one of the compressed video data units is indivisible by the fixed size of the memory segments, and where a portion of the indivisible compressed video data unit is stored with a portion of another compressed video data unit in one of the memory segments. The method may also include determining data storage information associated with the compressed video data units, and storing the data storage information in the memory. A system may have a video processing architecture designed to support the method.
    Type: Application
    Filed: November 10, 2010
    Publication date: May 10, 2012
    Applicant: QUALCOMM Incorporated
    Inventors: CHIA-YUAN TENG, Dan M. Chuang, Dane Gokce, Raghavendra C. Nagaraj, Vladan Andrijanic, Yiu-Wing Leung
  • Publication number: 20110150085
    Abstract: This disclosure describes techniques in which the decoding order of video blocks is modified relative to the display order of video blocks. The decoding order may be modified temporally such that video blocks of different video frames (or other coded units) are decoded in an alternating manner. In this case, the decoding order of video blocks may alternate between video blocks of two or more different frames. Furthermore, the decoding order may also be modified spatially within a given video block such that the video blocks are decoded in an order that does not correspond to the raster scan order of the video blocks. The techniques may improve the use of memory by improving the likelihood of cache hits, thereby reducing the number of memory loads from an external memory to an internal cache associated with the decoder.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 23, 2011
    Applicant: Qualcomm Incorporated
    Inventors: Vladan Andrijanic, Serag GadelRab