Abstract: A charge-and-add DC-DC voltage converter design using a switch network that toggles between two states, either simultaneously charging a flying capacitor (one or any number) or creating a DC voltage on the output capacitor by connecting all flaying capacitors in series thus adding the input voltage to remaining voltages on flying capacitors after they were charged. A pulse generator delivers a train of pulses to toggle the switch network. Depending on the applications, the train of pulses can be continuous when a fixed unregulated voltage must be delivered, or a defined number of pulses when voltage (power) surge is to be produced. The charge-and-add converters should be capable of delivering a regulated output voltage, and in this case, pulse-width modulation (PWM) or pulse frequency modulation (PFM) can be used.

Abstract: An all-electric vehicle propulsion system using a readily available high frequency AC Motor such as a 3-phase 400 Hz motor. A step-down gearbox increases torque and power thus decreasing the need for a high-power motor. Also, with the controllers of the invention, readily available, inexpensive batteries can be used as a primary source of energy. An efficient C&A-DC/DC step-up converter to power a high-efficiency motor driver can force the AC-motor windings circulate current in a resonance mode at around 220 volts. While 400 Hz and 220 volts are preferred, any voltage or frequency may be used, as well as any number of phases. Vehicle speed and torque can controlled by changing frequency and voltage applied to the motor usually using a variable resistor.

Abstract: A solid-state magnetic latch solenoid controller which is a multi-terminal device that includes an edge (slope) detector, an adjustable one-shot pulse generator, an input status detector, two or more selectable gate drivers and output powerful MOSFETs. The controller is an extremely low-power consumption device. There is virtually no power consumption (from 1-10 uA) from an internal power source or an external source of energy during either normally closed or open stages. This maintains battery voltage and hence output condition for years. A noticeable amount of power consumed only during the transitional cycles from the open to the closed and vice versa.

Abstract: A charge-and-add DC-DC voltage converter design using a switch network that toggles between two states, either simultaneously charging a flying capacitor (one or any number) or creating a DC voltage on the output capacitor by connecting all flaying capacitors in series thus adding the input voltage to remaining voltages on flying capacitors after they were charged. A pulse generator delivers a train of pulses to toggle the switch network. Depending on the applications, the train of pulses can be continuous when a fixed unregulated voltage must be delivered, or a defined number of pulses when voltage (power) surge is to be produced. The charge-and-add converters should be capable of delivering a regulated output voltage, and in this case, pulse-width modulation (PWM) or pulse frequency modulation (PFM) can be used.

Abstract: A solid-state magnetic latch solenoid controller which is a multi-terminal device that includes an edge (slope) detector, an adjustable one-shot pulse generator, an input status detector, two or more selectable gate drivers and output powerful MOSFETs. The controller is an extremely low-power consumption device. There is virtually no power consumption (from 1-10 uA) from an internal power source or an external source of energy during either normally closed or open stages. This maintains battery voltage and hence output condition for years. A noticeable amount of power consumed only during the transitional cycles from the open to the closed and vice versa.

Abstract: A normally closed solid state power relay with an optionally optically coupled input circuit at an input terminal with a driver circuit electrically coupled to input terminal to drive one or more a power transistors, preferably MOSFET transistors so that the power transistor is held in the on state by the driver when no voltage or a low level voltage is applied to the input terminal, and the power transistor is held in the off state by the driver when a high level voltage is applied to the input terminal. An energy storage device, a battery or capacitor, is coupled to the driver to powers the driver with the energy storage device being charged by energy from the input terminal when said input terminal when a high level voltage is applied to the input terminal. The energy storage device is charged by leakage current through a diode or through a resistor from the input circuit when the input circuit is in a high state.

Abstract: An intelligent, self-protected control module which is a fully protected and configured as a multi-terminal device controlling a number of power field-effect transistors for delivering power to loads. The device can contain a central processing unit or logic, precision Hall-Effect based current sensors for precise measuring of bypass currents, temperature sensors, and input/output circuitry as well as an optional RF receiver. The inputs can incorporate de-bouncing techniques to prevent false turn on/off. Inputs can provide command signals for the processor or logic with built-in watchdog circuitry to monitor the input power supply. The CPU or logic can provide communications with external devices, generate alarms, generate control signals to turn-on/turn-off power MOSFETs, and analyze currents and temperature of each channel. Unlike an electromechanical relay, the present invention is free from arcing and sparking, there are no contact materials to wear, and it is noiseless.

Abstract: A normally closed solid state power relay with an optionally optically coupled input circuit at an input terminal with a driver circuit electrically coupled to input terminal to drive one or more a power transistors, preferably MOSFET transistors so that the power transistor is held in the on state by the driver when no voltage or a low level voltage is applied to the input terminal, and the power transistor is held in the off state by the driver when a high level voltage is applied to the input terminal. An energy storage device, a battery or capacitor, is coupled to the driver to powers the driver with the energy storage device being charged by energy from the input terminal when said input terminal when a high level voltage is applied to the input terminal. The energy storage device is charged by leakage current through a diode or through a resistor from the input circuit when the input circuit is in a high state.

Abstract: A solid-state relay/breaker that can replace mechanical units to control any type of AC or DC load. Power MOSFETs or other transistors control a load current. A bypass current sensing path monitors MOSFET current and causes a shutdown through signal processing in the event of an over-current condition. This shutdown resembles that of a slow-blow fuse where the rate of shutdown is proportional to the value of the current. This prevents shutdown on momentary spikes or in-rush. In addition, temperature and internal power supply voltages are monitored to determine additional operational conditions where over-temperature or voltages out of range can also cause shutdown. The MOSFET and current sensing path are turned on and off in staggered timing with different slew rates to provide built-in hysteresis. The device can be manufactured in any type of package to match any type of environment or existing replacement requirement.

Abstract: The pulse-width discrimination system receives an input pulse whose leading edge enables an oscillator. The oscillator outputs frequency pulses to a comparison counter which counts the frequency pulses and compares them to a predetermined value, representing a minimum pulse width in which the user is interested. If the predetermined value is reached, the comparison counter triggers a tolerance window network which outputs a pulse, whose width represents the tolerance window, to one input of a coincidence output network. The input pulse is also received by a trailing-edge detector, which outputs a pulse to another input of the coincidence output network upon detection of the input pulse's trailing edge. If the input pulse's trailing edge coincides with the tolerance window, the coincidence output network will output an indication signal. Regardless of coincidence, the trailing edge of the input pulse disenables the oscillator, and the comparison counter is reset by the trailing-edge detector's output pulse.

Abstract: In a parallel input signal processor, parallel input signals are processed using logic (selective weight) averaging. A multiple number of signal detectors are placed relatively close together at the location at which signal detection is desired. The polarity of each of the input signals, with respect to a threshold value, is determined. If at least a predetermined number of the input signals have the same polarity with respect to the threshold value, the signals having the same polarities are amplified, combined, and averaged to form an output signal. Those signals not having identical polarities with the least predetermined number of signals are not included in the output signal. In the event that the number of input signals in coincidence with respect to the threshold value are not at least this predetermined number, no output signal is produced. The predetermined number is at least a majority of the input signals.

Abstract: A noise reduction system having a multiple number of parallel inputs amplifies a low level input signal and reduces noise. The noise reduction system includes an analog averaging circuit connected to the parallel inputs for amplifying the input signals and combining the parallel amplified input signals to generate an output signal. The parallel amplified input signals are examined for polarity by a digital logic averaging circuit. If all the parallel amplified input signals are positive or negative, respectively, the digital logic averaging circuit generates a coincidence signal. The coincidence signal then is used to adjust the gain of a variable gain amplifier connected to the output of the analog averaging circuit. The variable gain amplifier therefore amplifies those portions of the output signal of the analog averaging circuit corresponding to the true low level input signal.