Patents by Inventor Vladimir Faifer

Vladimir Faifer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7804294
    Abstract: A contactless sheet resistance measurement apparatus and method for measuring the sheet resistance of upper layer of ultra shallow p-n junction is disclosed. The apparatus comprises alternating light source optically coupled with first transparent and conducting electrode brought close to the wafer, the second electrode placed outside of illumination area. Using the measurement of the surface photovoltage signals inside illuminated area and outside this area and its phase shifts, linear SPV model describing its lateral distribution the sheet resistance and p-n junction conductance is determined.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: September 28, 2010
    Assignee: Abhee 1, L.P.
    Inventors: Vladimir Faifer, Phuc Van
  • Patent number: 7741833
    Abstract: A contactless sheet resistance measurement apparatus and method for measuring the sheet resistance of upper layer of ultra shallow p-n junction is disclosed. The apparatus comprises alternating light source optically coupled with first transparent and conducting electrode brought close to the wafer, the second electrode placed outside of illumination area. Using the measurement of the surface photovoltage signals inside illuminated area and outside this area and its phase shifts, linear SPV model describing its lateral distribution the sheet resistance and p-n junction conductance is determined.
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: June 22, 2010
    Assignee: Ahbee 1, L.P.
    Inventors: Vladimir Faifer, Phuc Van
  • Patent number: 7737680
    Abstract: A contactless sheet resistance measurement apparatus and method for measuring the sheet resistance of upper layer of ultra shallow p-n junction is disclosed. The apparatus comprises alternating light source optically coupled with first transparent and conducting electrode brought close to the wafer, the second electrode placed outside of illumination area. Using the measurement of the surface photovoltage signals inside illuminated area and outside this area and its phase shifts, linear SPV model describing its lateral distribution the sheet resistance and p-n junction conductance is determined.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: June 15, 2010
    Assignee: Ahbee 1, L.P.
    Inventors: Vladimir Faifer, Phuc Van
  • Patent number: 7737681
    Abstract: A contactless sheet resistance measurement apparatus and method for measuring the sheet resistance of upper layer of ultra shallow p-n junction is disclosed. The apparatus comprises alternating light source optically coupled with first transparent and conducting electrode brought close to the wafer, the second electrode placed outside of illumination area. Using the measurement of the surface photovoltage signals inside illuminated area and outside this area and its phase shifts, linear SPV model describing its lateral distribution the sheet resistance and p-n junction conductance is determined.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: June 15, 2010
    Assignee: Ahbee 1, L.P.
    Inventors: Vladimir Faifer, Phuc Van
  • Patent number: 7642772
    Abstract: A non-contact apparatus and method for measuring of the leakage current and capacitance of p-n junctions in test structures within scribe lanes of IC product wafers is disclosed. The apparatus comprises of a light source optically coupled with a fiber to a transparent electrode at the end of the fiber, which is brought close to the p-n junction under test. The ac signal generated from the test p-n junction is captured by this transparent and conducting coating electrode. The leakage current of a test p-n junction is determined using the frequency dependence of junction photo-voltage signal and reference signals from a p-n junction with low leakage current and known capacitance.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: January 5, 2010
    Assignee: Ahbee 1, L.P.
    Inventors: Vladimir Faifer, Michael Current, Timothy Wong
  • Patent number: 7414409
    Abstract: A non-contact apparatus and method for measuring of the leakage current and capacitance of p-n junctions in test structures within scribe lanes of IC product wafers is disclosed. The apparatus has a light source optically coupled with a fiber to a transparent electrode at the end of the fiber, which is brought close to the p-n junction under test. The ac signal generated from the test p-n junction is captured by this transparent and conducting coating electrode. The leakage current of a test p-n junction is determined using the frequency dependence of junction photo-voltage signal and reference signals from a p-n junction with low leakage current and known capacitance.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: August 19, 2008
    Inventors: Vladimir Faifer, Michael Current, Timothy Wong
  • Patent number: 7362088
    Abstract: A contactless sheet resistance measurement apparatus and method for measuring the sheet resistance of upper layer of ultra shallow p-n junction is disclosed. The apparatus comprises alternating light source optically coupled with first transparent and conducting electrode brought close to the wafer, the second electrode placed outside of illumination area. Using the measurement of the surface photovoltage signals inside illuminated area and outside this area and its phase shifts, linear SPV model describing its lateral distribution the sheet resistance and p-n junction conductance is determined.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: April 22, 2008
    Assignee: Ahbee 1, L.P.
    Inventors: Vladimir Faifer, Phuc Van
  • Patent number: 7034563
    Abstract: The invention relates to metrology of thin dielectric layers on semiconductor wafers, interfaces of dielectric layers to the wafer substrates and substrates properties of semiconductor wafers. The invention allows measurement of the metrology data for thin dielectric layers on semiconductor wafers electrically via using contact electrodes that align their contact surface to the wafer surface locally at the measurement sites.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: April 25, 2006
    Assignee: Ahbee 2, L.P., A California Limited Partnership
    Inventors: Vitali Souchkov, Vladimir Faifer, Victor Huang, Eugene Fukshansky, Alexander Artjomov, Anatoli Skljarnov
  • Patent number: 7019513
    Abstract: A contactless sheet resistance measurement apparatus and method for measuring the sheet resistance of a surface p-n junction and its leakage current is disclosed. The apparatus comprises an alternating light source optically coupled with a transparent and conducting electrode brought close to the junction, a second electrode placed outside of the illumination area, and a third grounded electrode surrounding the first and second electrodes. For measurements of junction capacitance, a calibration wafer with known sheet resistance is used to provide reference photovoltage signals. Using the measurement of the junction photovoltage (JPV) signals from the illuminated area and outside this area for calibration and test wafers at different light modulation frequencies, p-n junction sheet resistance and conductance (leakage current density) are determined.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: March 28, 2006
    Inventors: Vladimir Faifer, Phuc Van, Michael Current, Timothy Wong
  • Patent number: 6512384
    Abstract: Minority carrier diffusion lengths are determined fast, accurately, and conveniently by illuminating a surface of the semiconductor with a beam composed of a plurality of light fluxes each having a different wavelength modulated at a different frequency. Surface photovoltages induced by different light fluxes are simultaneously detected by monitoring surface photovoltage signals at the different modulation frequencies. The surface photovoltage signals are frequency calibrated and then used to calculated a minority carrier diffusion length.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: January 28, 2003
    Assignee: Semiconductor Diagnostics, Inc.
    Inventors: Jacek Lagowski, Vladimir Faifer, Andrei Aleinikov