Abstract: A pulse code analyzer for analyzing data transmitted by transmitter/receivers on a transmission facility interconnecting the transmitter/receivers. The analyzer apparatus has a data converter with a reference and an auxiliary channel for receiving the data and clock apparatus for recovering a clock signal from the data and generating variable time delayed subtone clock signals to the data converter reference and auxiliary channels. Processor apparatus coupled to the data converter and clock means controls a time delay between the subtone clock signals and the voltage level of data received by the channels to detect errors occurring in the received data and records the detected errors in counter apparatus coupled to the data converter channels and clock apparatus. The processor apparatus records a three dimensional matrix of the recorded errors determining a probability predicting the data errors.

Abstract: A pulse code analyzer for analyzing data transmitted by transmitter/receivers on a transmission facility interconnecting the transmitter/receivers. The analyzer apparatus has a data converter with a reference and an auxiliary channel for receiving the data and clock apparatus for recovering a clock signal from the data and generating variable time delayed subtone clock signals to the data converter reference and auxiliary channels. Processor apparatus coupled to the data converter and clock means controls a time delay between the subtone clock signals and the voltage level of data received by the channels to detect errors occurring in the received data and records the detected errors in counter apparatus coupled to the data converter channels and clock apparatus. The processor apparatus records a three dimensional matrix of the recorded errors determining a probability predicting the data errors.