Patents by Inventor Vladimir N. Bliznetsov

Vladimir N. Bliznetsov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6913994
    Abstract: An improved method of forming a dual damascene structure that includes an organosilicate glass (OSG) dielectric layer is described. A via first process is followed in which a via is formed in the OSG layer and preferably stops on a SiC layer. The SiC layer is removed prior to stripping a photoresist containing the via pattern. A planarizing BARC layer is formed in the via to protect the exposed substrate from damage during trench formation. The method provides higher Kelvin via and via chain yields. Damage to the OSG layer at top corners of the via and trench is avoided. Furthermore, there is no pitting in the OSG layer at the trench bottom. Vertical sidewalls are achieved in the via and trench openings and via CD is maintained. The OSG loss during etching is minimized by removing the etch stop layer at an early stage of the dual damascene sequence.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: July 5, 2005
    Assignee: Agency for Science, Technology and Research
    Inventors: Qiang Guo, Ahila Krishnamoorthy, Xiaomei Bu, Vladimir N. Bliznetsov
  • Publication number: 20040203223
    Abstract: An improved method of forming a dual damascene structure that includes an organosilicate glass (OSG) dielectric layer is described. A via first process is followed in which a via is formed in the OSG layer and preferably stops on a SiC layer. The SiC layer is removed prior to stripping a photoresist containing the via pattern. A planarizing BARC layer is formed in the via to protect the exposed substrate from damage during trench formation. The method provides higher Kelvin via and via chain yields. Damage to the OSG layer at top comers of the via and trench is avoided. Furthermore, there is no pitting in the OSG layer at the trench bottom. Vertical sidewalls are achieved in the via and trench openings and via CD is maintained. The OSG loss during etching is minimized by removing the etch stop layer at an early stage of the dual damascene sequence.
    Type: Application
    Filed: April 9, 2003
    Publication date: October 14, 2004
    Applicant: Institute of Microelectronics
    Inventors: Qiang Guo, Ahila Krishnamoorthy, Xiaomei Bu, Vladimir N. Bliznetsov
  • Patent number: 6743713
    Abstract: A method of forming a via-first type dual damascene structure in the absence of an etch stop layer and without via-edge erosion or via-bottom punch-through is described. The invention uses two organic films deposited within via hole prior to trench etching. A via hole over a lower level metal line is first etched in the dielectric film. Two, preferably organic, bottom anti-reflective coating (BARC) films, first one being the conformal type to coat the surfaces and the walls of the via and the second one being the planarizing type to at least partially fill the via, are then deposited. Using a mask aligned to via hole, a wiring trench of desired depth is etched in the top portion of the dielectric film. During trench etching, the conformal BARC-1 film protects the via-edges from eroding and the planarizing BARC-2 film prevents punch-through of the via-bottom. Desired metal such as aluminum or copper are deposited within said dual damascene pattern.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: June 1, 2004
    Assignee: Institute of Microelectronics
    Inventors: Moitreyee Mukherjee-Roy, Vladimir N. Bliznetsov
  • Publication number: 20030216026
    Abstract: A method of forming a via-first type dual damascene structure in the absence of an etch stop layer and without via-edge erosion or via-bottom punch-through is described. The invention uses two organic films deposited within via hole prior to trench etching. A via bole over a lower level metal line is first etched in the dielectric film. Two, preferably organic, bottom antireflective coating (BARC) films, first one being the conformal type to coat the surfaces and the walls of the via and the second one being the planarizing type to at least partially fill the via, are then deposited. Using a mask aligned to via hole, a wiring trench of desired depth is etched in the top portion of the dielectric film. During trench etching, the conformal BARC-1 film protects the via-edges from eroding and the planarizing BARC-2 film prevents punch-through of the via-bottom. Desired metal such as aluminum or copper are deposited within said dual damascene pattern.
    Type: Application
    Filed: May 15, 2002
    Publication date: November 20, 2003
    Applicant: Institute of microelectronics
    Inventors: Moitreyee Mukherjee-Roy, Vladimir N. Bliznetsov