Patents by Inventor Vladimir Shveidel

Vladimir Shveidel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250086028
    Abstract: A percentage of the resource units contained in a shared resource pool of a data storage system is loaded into a global partition, and the resource units not loaded into the global partition are loaded into per-core partitions. Each per-core partition corresponds to one of multiple processor cores in the data storage system. Resource units are allocated from each one of the per-core partitions only to a work flow executing on the corresponding processor core. The number of available resource units in each one of the per-core partitions is periodically rebalanced by moving resource units between the global partition and that per-core partition.
    Type: Application
    Filed: September 12, 2023
    Publication date: March 13, 2025
    Inventors: Vladimir Shveidel, Jenny Derzhavetz
  • Publication number: 20250077292
    Abstract: A shared portion of processor cores is allocated within the processor cores of a data storage system. Each processor core in the shared portion of processor cores is shared between a storage system application executing in the data storage system and a containerized service also executing in the data storage system. A voluntary yield time interval is dynamically generated based on both a workload of the containerized service and a workload of the storage system application. Each processor core in the shared portion of the processor cores is periodically voluntarily yielded by the storage system application, based on the voluntary yield time interval, to allow execution of the containerized service on that processor core.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 6, 2025
    Inventors: Vladimir Shveidel, Roy Koren
  • Publication number: 20250060991
    Abstract: In at least one embodiment, techniques for resource regulation and scheduling can include: allocating a first amount of tokens denoting an amount of CPU resources available for executing background (BG) maintenance tasks; determining a distribution of the first amount of tokens among a plurality of CPU cores upon which BG maintenance tasks are allowed to execute; and scheduling, by a scheduler component, a first plurality of BG maintenance tasks for execution on the plurality of CPU cores in accordance with a plurality of averages and in accordance with the distribution, wherein each of the plurality of averages denotes an average number of tokens of CPU resources consumed to complete execution of a corresponding one of the first plurality of BG maintenance tasks of a particular BG maintenance task subtype.
    Type: Application
    Filed: August 15, 2023
    Publication date: February 20, 2025
    Applicant: Dell Products L.P.
    Inventors: Vladimir Shveidel, Maher Kachmar
  • Patent number: 12223196
    Abstract: A technique for managing metadata changes in a storage system provides different aggregation policies for use with different metadata. The technique includes assigning metadata changes to respective aggregation policies and storing the assigned metadata changes in a set of data structures. The technique further includes destaging the metadata changes from the set of data structures separately for the different aggregation policies in accordance with settings specific to those aggregation policies.
    Type: Grant
    Filed: October 25, 2023
    Date of Patent: February 11, 2025
    Assignee: Dell Products L.P.
    Inventors: Jenny Derzhavetz, Vladimir Shveidel, Nimrod Shani
  • Patent number: 12222862
    Abstract: Techniques for processing a read I/O operation that reads first content stored at a target logical address can include: determining, using the target logical address as a first key to index into a first cache, whether the first cache includes a first cache entry caching first metadata used to access a first physical storage location including the first content stored at the target logical address; responsive to determining the first cache includes the first cache entry, determining, using the first metadata as a second key to index into a second cache, whether the second cache includes a second cache entry caching the first content stored at the target logical address; and responsive to determining the second cache includes the second entry, returning the first content from the second entry of the second cache in response to the read I/O operation.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: February 11, 2025
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Vamsi K. Vankamamidi
  • Patent number: 12210755
    Abstract: Nodes in a storage system can autonomously ingest I/O requests and flush data to storage. First and second nodes determine a sequence separator, the sequence separator corresponding to an entry in a page descriptor ring that separates two flushing work sets (FWS). The first node receives an input/output (I/O) request and allocates a sequence identification (ID) number to the I/O request. The first node determines a FWS for the I/O request based on the sequence separator and the sequence ID number, and commits the I/O request using the sequence ID number. The I/O request and the sequence ID number are sent to the second node.
    Type: Grant
    Filed: October 27, 2023
    Date of Patent: January 28, 2025
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Geng Han, Yousheng Liu
  • Patent number: 12204412
    Abstract: Data replication techniques can include receiving, at a source system, a write directed to a source logical device configured for asynchronous remote replication to a destination system; performing processing that flushes a transaction log entry for the write; and performing replication processing that uses a replication queue including a replication queue entry corresponding to the write that stores the first content to a logical address. The processing can create a metadata (MD) log entry in a MD log for the write responsive to determining that the write is directed to the source logical device configured for asynchronous remote replication and that the first content has not been replicated. Responsive to the first content not being in cache, the first content can be retrieved using the reference to a storage location storing the first content. The reference can be obtained from the MID log entry or the replication queue entry.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: January 21, 2025
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Vamsi K. Vankamamidi
  • Publication number: 20250021229
    Abstract: In at least one embodiment, processing can include: receiving, at a first node, a read operation that reads content of a logical address, wherein a second node, but not the first node, owns the logical address; and performing optimized read processing for the read operation. The optimized read processing can include: performing, in parallel, first processing that obtains a first address hint and first content corresponding to the logical address, and second processing that obtains a second address hint corresponding to the logical address; determining whether the first and second address hints match; if the first and second address hints match, determining that first content is valid content stored at the target logical address; if the first and second address hints do not match, determining the first content is not stored at the logical address, and using the second address hint to obtain second content stored at the logical address.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 16, 2025
    Applicant: Dell Products L.P.
    Inventors: Vladimir Shveidel, Nimrod Shani, Dror Zalstein
  • Publication number: 20250021387
    Abstract: Performance metrics are continuously monitored for each processor core in a shared portion of multiple processor cores in a data storage system. Each processor core in the shared portion is shared between a storage system application located in the data storage system and a containerized service also located in the data storage system. The monitored performance metrics indicate I/O request processing latency and an amount of the processing capacity of each individual processor core in the shared portion of the processor cores that is available for use by the storage system application. Based on the performance metrics, the I/O request processing is preferentially assigned to processor cores that have relatively lower I/O request processing latency, and the background work item processing is preferentially assigned to processor cores that have relatively higher amounts of capacity available for use by the storage system application.
    Type: Application
    Filed: July 10, 2023
    Publication date: January 16, 2025
    Inventors: Vladimir Shveidel, Roy Koren
  • Patent number: 12197757
    Abstract: Techniques for providing a virtual federation approach to increasing efficiency of processing circuitry utilization in storage nodes with a high number of cores. The techniques include, for each of two (2) physical nodes, logically partitioning a plurality of cores into a first domain of cores and a second domain of cores. The techniques include designating the first domain of cores of each physical node as belonging to a first virtual node. The techniques include designating the second domain of cores of each physical node as belonging to a second virtual node. The techniques include operating the first virtual nodes on the two (2) underlying physical nodes as a first virtual appliance, and operating the second virtual nodes on the two (2) underlying physical nodes as a second virtual appliance. In this way, scalability and speedup efficiency can be increased in a multi-core processing environment with a high number of cores.
    Type: Grant
    Filed: October 4, 2023
    Date of Patent: January 14, 2025
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Amitai Alkalay, Steven A. Morley
  • Patent number: 12197728
    Abstract: In at least one embodiment, processing can include: receiving, at a first node, a read operation that reads content of a logical address, wherein a second node, but not the first node, owns the logical address; and performing optimized read processing for the read operation. The optimized read processing can include: performing, in parallel, first processing that obtains a first address hint and first content corresponding to the logical address, and second processing that obtains a second address hint corresponding to the logical address; determining whether the first and second address hints match; if the first and second address hints match, determining that first content is valid content stored at the target logical address; if the first and second address hints do not match, determining the first content is not stored at the logical address, and using the second address hint to obtain second content stored at the logical address.
    Type: Grant
    Filed: July 12, 2023
    Date of Patent: January 14, 2025
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Nimrod Shani, Dror Zalstein
  • Patent number: 12189525
    Abstract: A method, computer program product, and computing system for identifying a plurality of candidate pages associated with a page consolidation operation. A metadata log entry is generated with information concerning the page consolidation operation, thus defining a page consolidation metadata log entry. The page consolidation operation is processed when at least a threshold number of page consolidation metadata log entries are generated.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: January 7, 2025
    Assignee: Dell Products L.P.
    Inventors: Michael Litvak, Vladimir Shveidel
  • Patent number: 12182448
    Abstract: Logical address slices and corresponding metadata pages of mapping information can be partitioned into sets. Each node can be assigned exclusive ownership of one of the sets. In at least one embodiment, for a read I/O which is received at a first node and directed to a logical address LA1 that is owned by a second node, the first node can request that the second owning node perform resolution processing for LA1. The second node can own both LA1 and corresponding metadata pages included in mapping information used to map LA1 to a corresponding physical location PA1 including content C1 stored at LA1. The second node can perform resolution processing for LA1 using the metadata pages corresponding to LA1 to either read and return C1 to the first node, or obtain and return PA1 to the first node where the first node can then read C1 directly using PA1.
    Type: Grant
    Filed: April 14, 2023
    Date of Patent: December 31, 2024
    Assignee: Dell Products L.P.
    Inventors: Vamsi K. Vankamamidi, Uri Shabi, Geng Han, Vladimir Shveidel
  • Patent number: 12174752
    Abstract: Techniques for providing a “bin-less” metadata page allocator for clustered systems with log-structured metadata storage. The techniques include providing a mapping structure in memory of a storage node of a clustered system. The mapping structure can have multiple layers configured to map logical addresses of metadata pages to physical addresses of storage drives within a storage array. The techniques include providing a translation table configured to translate logical addresses of metadata pages to corresponding current physical addresses of storage drives within the storage array. The techniques include, in response to an allocated logical address of a metadata page no longer being in-use, replacing its corresponding current physical address with a predefined value in the translation table, freeing the logical address, and inserting the freed logical address into a free logical address array. The techniques include allocating the freed logical address from the free logical address array.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: December 24, 2024
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Uri Shabi, Vamsi K. Vankamamidi
  • Publication number: 20240411696
    Abstract: In one embodiment, processing can include: receiving, at a first node, a read I/O to read content C1 of logical address LA, wherein the first node does not own LA; and responsive to determining a hash table of the first node does not include a matching entry for LA, performing processing including: sending a request from the first node to a second node that owns LA; sending, to the first node, a response including an address hint for LA and additional address hints for logical addresses, wherein LA and the additional address hints are included in a logical address subrange associated with a single metadata page used in mapping LA and the logical addresses to physical storage locations that store content of LA and the logical addresses; the first node adding entries to the hash table for the additional address hints; and obtaining C1 using the address hint for LA.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 12, 2024
    Applicant: Dell Products L.P.
    Inventors: Vladimir Shveidel, Amitai Alkalay
  • Publication number: 20240411702
    Abstract: In at least one embodiment, processing can include receiving, at a first node, a read request directed to a logical address LA owned by a second node. The first node can locally cache content and an address hint corresponding to LA. The first node can issue a request to the second node. The request can include a flag to suppress the second node from returning content stored at the target logical address. The first node can receive a response including an address used to read current content of LA1 from back-end non-volatile storage. The first node can determine whether the address matches the address hint cached on the first node. If the first node determines the address and address hint match, the cached content of LA stored on the first node is valid and can be returned in response to the read as current content stored at LA.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 12, 2024
    Applicant: Dell Products L.P.
    Inventors: Vladimir Shveidel, Uri Shabi, Vamsi K. Vankamamidl, Samuel Mulls
  • Patent number: 12164498
    Abstract: A method, computer program product, and computing system for receiving a plurality of requests to perform an operation of a first operation type on a storage object. A shared write lock associated with the first operation type is provided to each thread requesting to perform an operation of the first operation type. Concurrent requests to perform operations of the first operation type on the storage object are processed by each requesting thread based upon, at least in part, the shared write lock associated with the first operation type provided to each requesting thread.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: December 10, 2024
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Bar David
  • Patent number: 12164770
    Abstract: Techniques for processing a read I/O operation directed to a logical address LA1 can include: determining a logical address range R1 including LA1; determining whether a unified cache includes a cached object corresponding to R1; and responsive to determining that the unified cache does not include a cached object corresponding to R1, determining a unified cache miss with respect to R1 and performing unified cache miss processing including: traversing metadata pages, including a metadata leaf page, corresponding to LA1; storing indirect pointers from entries of the metadata leaf page to corresponding entries of a new metadata leaf object of the unified cache corresponding to R1; performing processing using an indirect pointer of an entry of the new metadata leaf object, where the entry corresponds to LA1 and the processing includes retrieving the content of LA1 using the indirect pointer; and returning the content in response to the read I/O operation.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: December 10, 2024
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Vamsi K Vankamamidi, Amitai Alkalay
  • Patent number: 12164771
    Abstract: A method, computer program product, and computing system for dividing a logical address space into a first and at least a second set of data portions. Exclusive ownership of the first set may be assigned to a first storage node of a storage cluster. Exclusive ownership of the second set may be assigned to at least a second storage node of the storage cluster. One or more IO requests associated with one or more of the first set of data portions and the at least a second set of data portions may be processed without transferring data portions between the first the at least a second storage node based upon the exclusive ownership of the first set of data portions by the first storage node and the exclusive ownership of the at least a second set of data portions by the at least a second storage node.
    Type: Grant
    Filed: January 27, 2023
    Date of Patent: December 10, 2024
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Nimrod Shani
  • Publication number: 20240402912
    Abstract: Techniques can include: configuring a federation to have a volume as active from only a first storage system so that hosts only sends I/O operations, directed to the first volume, to the first storage system; configuring a second storage system of the federation as inactive with respect to volume; determining, in accordance with criteria, to allow I/O operations directed to the volume to be sent to both the first and second storage systems; transitioning the second storage system, with respect to the volume, from inactive to active; and receiving, from a host at the first and second storage systems, I/O operations directed to the volume while the first and second storage systems are configured as active. The I/O operations can include a first I/O operation received at the second storage system which is redirected, by the second storage system, to the first storage system for servicing.
    Type: Application
    Filed: August 13, 2024
    Publication date: December 5, 2024
    Applicant: Dell Products L.P.
    Inventors: Amitai Alkalay, Vladimir Shveidel, Lior Kamran