Abstract: According to the present invention, a composite semiconductor substrate (1) for epitaxial growth of a compound semiconductor material (1) comprises a ceramic semiconductor support layer (4), and a single crystalline epitaxial layer (3) formed of the compound semi-conductor material on the ceramic semiconductor support layer.

Abstract: A semiconductor structure with low mechanical stresses, formed of nitrides of group III metals on a (0001) oriented foreign substrate (1) and a method for reducing internal mechanical stresses in a semiconductor structure formed of nitrides of group III metals on a (0001) oriented foreign substrate (1). The method comprises the steps of; growing nitride on the foreign substrate (1) to form a first nitride layer (2); patterning the first nitride layer (2) by selectively removing volumes of it to a predetermined depth from the upper surface of the first nitride layer (2), for providing relaxation of mechanical stress ? in the remaining portions of the layer between the removed volumes; and growing, on the first nitride layer (2), additional nitride until a continuous second nitride layer (8) is formed, the second nitride layer (8) enclosing voids (7) from the removed volumes under the second nitride layer (8) inside the semiconductor structure.

Abstract: An LED chip (1) grown on an electrically insulating substrate (4) comprises a lower current-distributing layer (5) of a first conductivity type, a first electrode (2), a vertical layer structure (5, 6, 7), the last two being formed on the lower current-distributing layer horizontally separated from each other, the vertical layer structure comprising an active layer (6) and an upper current-distributing layer (8) of a second conductivity type above the active layer, and a second electrode (3) formed on the upper current-distributing layer, the geometry of the electrodes being adjusted to provide a horizontal distance between the electrodes lower than the current spreading length of the chip. According to the present invention, a vertical trench (9) is formed between the electrodes (2, 3), the trench extending through the chip (1), including the lower current-distributing layer (5), for controlling the horizontal current flow in order to achieve a uniform current density over the active layer (6).

Abstract: The light emitting semiconductor device (1) of the present invention is made of nitrides of group III metals and comprises a layer structure comprising an n-type semiconductor layer (2), a p-type semiconductor layer (3), an active region (4) between the n-type semiconductor layer and the p-type semiconductor layer. The layer structure has a contact surface (5) defined by one of the n-type and p-type semiconductor layers and comprises further a reflective contact structure (6) attached to the contact surface. According to the present invention, the reflective contact structure (6) comprises: a first transparent conductive oxide (TCO) contact layer (13), having a poly-crystalline structure, attached to the contact surface (5) of the layer structure; a second transparent conductive oxide (TCO) contact layer (14) having an amorphous structure; and a metallic reflective layer (15) attached to the second TCO layer.

Abstract: A semiconductor structure is formed of nitrides of group III metals having wurtzite crystal structure and grown in vapor phase on a (0001) oriented semiconductor substrate. The structure comprises a bottom cladding layer, a top cladding layer, and a diffusion region positioned between the cladding layers for diffusing light propagating within the semiconductor structure. The diffuse region has refractive index different from those of the cladding layers and non-flat surfaces for providing light diffusing interfaces between the diffusion region and the cladding layers. According to the invention, the diffusion region comprises a plurality of diffusion layers, compositions and thicknesses of said diffusion layers having been chosen to avoid formation of strain-induced dislocations in the diffusion region, and adjacent diffusion layers having different refractive indices in order to further enhance the diffusion efficiency.

Abstract: A strained semiconductor heterostructure (10) comprises an injection region comprising a first emitter layer (11) having p-type conductivity and a second emitter layer (12) having n-type conductivity, and a light generation layer (13) positioned between the first emitter layer (11) and the second emitter layer (12). An electron capture region (14) is positioned between the light generation layer (13) and the second emitter layer (12), said electron capture region comprising a capture layer (16) adjacent to the second emitter layer, and a confining layer (15) adjacent to said electron capture layer. According to the present invention, the widths and materials of the confining and capture layers (15, 16) are selected to provide energy difference between one of localized energy levels for electrons in the capture layer (16) and the conduction band bottom of the second emitter layer (12) equal to the energy of the optical phonon.

Abstract: A semiconductor structure is formed of nitrides of group III metals having wurtzite crystal structure and grown in vapor phase on a (0001) oriented semiconductor substrate. The structure comprises a bottom cladding layer, a top cladding layer, and a diffusion region positioned between the cladding layers for diffusing light propagating within the semiconductor structure. The diffuse region has refractive index different from those of the cladding layers and non-flat surfaces for providing light diffusing interfaces between the diffusion region and the cladding layers. According to the invention, the diffusion region comprises a plurality of diffusion layers, compositions and thicknesses of said diffusion layers having been chosen to avoid formation of strain-induced dislocations in the diffusion region, and adjacent diffusion layers having different refractive indices in order to further enhance the diffusion efficiency.

Abstract: An HVPE reactor arrangement comprises a reaction chamber (1), a gas inlet (2) for introducing process gases to the reaction chamber, a residual gas outlet (3), and a pump (4) for evacuating the residual gases from the reaction chamber via the residual gas outlet, the pump being capable of creating and maintaining in the reaction chamber a pressure less than or equal to about 100 mbar. According to the present invention, the reactor arrangement comprises means (6, 7, V2, V3) for supplying dissolving fluid to the pump for dissolving the possible parasitic deposition of the agents of the residual gases on the pump inner surfaces.

Abstract: A semiconductor structure is formed of nitrides of group III metals having wurtzite crystal structure and grown in vapor phase on a (0001) oriented semiconductor substrate. The structure comprises a bottom cladding layer, a top cladding layer, and a diffusion region positioned between the cladding layers for diffusing light propagating within the semiconductor structure. The diffuse region has refractive index different from those of the cladding layers and non-flat surfaces for providing light diffusing interfaces between the diffusion region and the cladding layers. According to the invention, the diffusion region comprises a plurality of diffusion layers, compositions and thicknesses of said diffusion layers having been chosen to avoid formation of strain-induced dislocations in the diffusion region, and adjacent diffusion layers having different refractive indices in order to further enhance the diffusion efficiency.

Abstract: An LED chip (1) grown on an electrically insulating substrate (4) comprises a lower current-distributing layer (5) of a first conductivity type, a first electrode (2), a vertical layer structure (5, 6, 7), the last two being formed on the lower current-distributing layer horizontally separated from each other, the vertical layer structure comprising an active layer (6) and an upper current-distributing layer (8) of a second conductivity type above the active layer, and a second electrode (3) formed on the upper current-distributing layer, the geometry of the electrodes being adjusted to provide a horizontal distance between the electrodes lower than the current spreading length of the chip. According to the present invention, a vertical trench (9) is formed between the electrodes (2, 3), the trench extending through the chip (1), including the lower current-distributing layer (5), for controlling the horizontal current flow in order to achieve a uniform current density over the active layer (6).

Abstract: A semiconductor structure is formed of nitrides of group III metals having wurtzite crystal structure and grown in vapor phase on a (0001) oriented semiconductor substrate. The structure comprises a bottom cladding layer, a top cladding layer, and a diffusion region positioned between the cladding layers for diffusing light propagating within the semiconductor structure. The diffuse region has refractive index different from those of the cladding layers and non-flat surfaces for providing light diffusing interfaces between the diffusion region and the cladding layers. According to the invention, the diffusion region comprises a plurality of diffusion layers, compositions and thicknesses of said diffusion layers having been chosen to avoid formation of strain-induced dislocations in the diffusion region, and adjacent diffusion layers having different refractive indices in order to further enhance the diffusion efficiency.

Abstract: A strained semiconductor heterostructure (10) comprises an injection region comprising a first emitter layer (11) having p-type conductivity and a second emitter layer (12) having n-type conductivity, and a light generation layer (13) positioned between the first emitter layer (11) and the second emitter layer (12). An electron capture region (14) is positioned between the light generation layer (13) and the second emitter layer (12), said electron capture region comprising a capture layer (16) adjacent to the second emitter layer, and a confining layer (15) adjacent to said electron capture layer. According to the present invention, the widths and materials of the confining and capture layers (15, 16) are selected to provide energy difference between one of localized energy levels for electrons in the capture layer (16) and the conduction band bottom of the second emitter layer (12) equal to the energy of the optical phonon.