Abstract: A data-transmission device has a number of N uplink interfaces routable to an output element over a processing line provided with data-processing components. A first processing line and a second processing line are provided each having two separate processing rows for in each case N/2 data lines. Each processing line has a circuit arrangement by means of which the N/2 data lines connected to the processing line can be connected to the respective other processing line to one of the two processing rows available there. The circuit arrangements is controlled in such a way that one of the two processing lines is active and the respective other can be switched to a standby mode so that the data traffic waiting at the N uplink interfaces can be handled via one of the two processing lines.

Abstract: Message cells, cell comprising partially different priorities are transmitted via a first communication network. According to the invention, at least one of the message cells to be transmitted and comprising the same priority is added to a user data field of at least one data packet of a second packet-oriented communication network. A transmission priority (user priority) derived from the priority of the at least one added message cell, cell is associated with the data packet, according to which the at least one data packet is at least partially transmitted with the at least one added message cell, cell to/via the packet-oriented communication network. Advantageously, the message cells comprising the same priority or service category and pertaining to different virtual connections are added to a data or transmission frame of the packet-oriented communication network, thus fulfilling real time requirements.

Abstract: The invention relates to a data transmission device having a number of N uplink interfaces (E1, UP) that can be directed via a processing line (A, B) provided with a data processing component (T, LIC) to a starting element (F). The invention is characterized in that a first processing line (A) and a second processing line (B) are provided, each comprising two separate processing rows (A1, A2, B1, B2) for N/2 data lines each. A first half (1 to 8) of the N uplink interfaces (E1, UP) is connected to the first processing line (A) and the second half (9 to 16) of the N uplink interfaces (E1, UP) is connected to the second processing line (B). Every processing line (A, B) comprises a circuit arrangement (8<SB>A</SB>, 8<SB>B</SB>) that connects the N/2 data lines connected to the processing line (A or B) to the respective other processing line (B or A) to one of the processing rows (A1, A2, B1, B2) available there.

Abstract: Message cells, cell comprising partially different priorities are transmitted via a first communication network. According to the invention, at least one of the message cells to be transmitted and comprising the same priority is added to a user data field of at least one data packet of a second packet-oriented communication network. A transmission priority (user priority) derived from the priority of the at least one added message cell, cell is associated with the data packet, according to which the at least one data packet is at least partially transmitted with the at least one added message cell, cell to/via the packet-oriented communication network. Advantageously, the message cells comprising the same priority or service category and pertaining to different virtual connections are added to a data or transmission frame of the packet-oriented communication network, thus fulfilling real time requirements.

Abstract: The radio control unit (RDU) which is near to the switching office and which is connected via a transmission link (UT) to radio base stations (RBS) near the subscriber is divided into a plurality of switching office-side interfaces (LEIM) conceived as a downtime unit and subscriber-side interfaces (RBIM) which have multiple access to one another in various ways via a multiple bus system. The subscriber connection data are distributed over the databases of the interfaces (RBIM, LEIM). There is good insensitivity to failures with a low level of expenditure on hardware and development.