Abstract: The present invention relates to lipopeptide-based compounds for use in the diagnosis, prevention and/or treatment of a liver disease or condition, preferably liver involved metabolic diseases, as well as in the control or modification of the cholesterol level or cholesterol uptake and, thus, diagnosis, prevention and/or treatment of a cardiovascular disease. The present invention furthermore relates to an in vitro or in vivo assay or method for testing or measuring the NTCP-mediated transport of test compound(s). The present invention furthermore relates to a method for the diagnosis, prevention and/or treatment of a liver disease or condition, comprising administering a therapeutically effective amount of a lipopeptide-based compound to a patient. The present invention furthermore relates to a method for the diagnosis, prevention and/or treatment of a cardiovascular disease.

Abstract: A message limit value to be used in enqueuing one or more messages on a queue of a device of the computing environment is obtained. The message limit value indicates whether an extended maximum message length is supported by the device. The extended maximum message length is different from a default maximum message length supported by the device. Based on determining that the extended maximum message length is supported and that the obtained message limit value has a defined relationship with a select value, at least one message of an extended length is enqueued on the queue of the device.

Abstract: A message limit value to be used in enqueuing one or more messages on a queue of a device of the computing environment is obtained. The message limit value indicates whether an extended maximum message length is supported by the device. The extended maximum message length is different from a default maximum message length supported by the device. Based on determining that the extended maximum message length is supported and that the obtained message limit value has a defined relationship with a select value, at least one message of an extended length is enqueued on the queue of the device.

Abstract: At least one secure object of a security module is bound to a secure guest. A trusted component determines whether metadata of the secure guest includes a confidential binding attribute for the security module. Based on determining that the metadata includes the confidential binding attribute, the trusted component configures the security module for the secure guest in a select mode. The select mode prevents certain operations from being intercepted by a hypervisor associated with the secure guest. The trusted component intercepts a security module communication and performs a cryptographic operation on one or more secure objects of the security module communication using the confidential binding attribute to provide a cryptographic result. An outcome of the security module communication, which includes the cryptographic result, is provided to a receiver.

Abstract: A security module, such as a cryptographic adapter, is reserved for a secure guest of a computing environment. The reserving includes binding one or more queues of the security module to the secure guest. The one or more queues are then managed based on one or more actions relating to the reservation.

Abstract: At least one secure object of a security module is bound to a secure guest. A trusted component determines whether metadata of the secure guest includes a confidential binding attribute for the security module. Based on determining that the metadata includes the confidential binding attribute, the trusted component configures the security module for the secure guest in a select mode. The select mode prevents certain operations from being intercepted by a hypervisor associated with the secure guest. The trusted component intercepts a security module communication and performs a cryptographic operation on one or more secure objects of the security module communication using the confidential binding attribute to provide a cryptographic result. An outcome of the security module communication, which includes the cryptographic result, is provided to a receiver.

Abstract: A security module, such as a cryptographic adapter, is reserved for a secure guest of a computing environment. The reserving includes binding one or more queues of the security module to the secure guest. The one or more queues are then managed based on one or more actions relating to the reservation.

Abstract: A processor determines that processing of a thread is suspended due to limited availability of a processing resource. The processor supports execution of the plurality of threads in parallel. The processor obtains a lock on a second processing resource that is substitutable as a resource during processing of the first thread. The second processing resource is included as part of a component that is external to the processor. The component supports a number of threads that is less than the plurality of threads. The processing of the thread is suspended until the lock is available. The processor processes the first thread using the second processing resource. The processor includes a shared register to support mapping a portion of the plurality of threads to the component. The portion of the plurality of threads is equal to, at most, the number of threads supported by component.

Abstract: A processor determines that processing of a thread is suspended due to limited availability of a processing resource. The processor supports execution of the plurality of threads in parallel. The processor obtains a lock on a second processing resource that is substitutable as a resource during processing of the first thread. The second processing resource is included as part of a component that is external to the processor. The component supports a number of threads that is less than the plurality of threads. The processing of the thread is suspended until the lock is available. The processor processes the first thread using the second processing resource. The processor includes a shared register to support mapping a portion of the plurality of threads to the component. The portion of the plurality of threads is equal to, at most, the number of threads supported by component.

Abstract: A processor determines that processing of a thread is suspended due to limited availability of a processing resource. The processor supports execution of the plurality of threads in parallel. The processor obtains a lock on a second processing resource that is substitutable as a resource during processing of the first thread. The second processing resource is included as part of a component that is external to the processor. The component supports a number of threads that is less than the plurality of threads. The processing of the thread is suspended until the lock is available. The processor processes the first thread using the second processing resource. The processor includes a shared register to support mapping a portion of the plurality of threads to the component. The portion of the plurality of threads is equal to, at most, the number of threads supported by component.

Abstract: A processor determines that processing of a thread is suspended due to limited availability of a processing resource. The processor supports execution of the plurality of threads in parallel. The processor obtains a lock on a second processing resource that is substitutable as a resource during processing of the first thread. The second processing resource is included as part of a component that is external to the processor. The component supports a number of threads that is less than the plurality of threads. The processing of the thread is suspended until the lock is available. The processor processes the first thread using the second processing resource. The processor includes a shared register to support mapping a portion of the plurality of threads to the component. The portion of the plurality of threads is equal to, at most, the number of threads supported by component.

Abstract: A method for simulating an operation of a digital circuit (01) is described. The method utilizes cycle simulation, wherein in a cycle based simulation model (34) of the digital circuit (01) components (02, 03, 04, 05) of the digital circuit (01) are clocked synchronously every cycle (19) of a functional clock (Clk). According to the invention, real digital circuit (01), i.e. chip or combinatorial logic (01), timing information is included in the cycle simulation by inserting delay latches (15, 16, 17) into the cycle based simulation model (34) of the digital circuit (01), wherein a non-functional clock (Sim clock) is used to clock the delay latches (15, 16, 17), so that each delay latch (15, 16, 17) delays the propagation of a signal (I, J, K) by a cycle (20) of the non-functional clock (Sim clock).

Abstract: The portable electronic device (1) allows functions and/or data of a vehicle to be controlled and managed. In order to do this, the portable device comprises, in a casing having an upper part (10) fixed, for example, in a removable manner on a lower part (11), means for wirelessly transmitting and receiving signals for short range personalised communication with the vehicle. It further comprises a microprocessor unit for processing functions and/or data of the device and of the vehicle, at least one display screen (3) having a portion which is visible from outside the casing for displaying different menus or data of the device or of the vehicle, and manual control means (5, 6) for controlling the execution of functions of the microprocessor unit. A power source, such as a battery, is provided in the casing for supplying electric power to all the electronic components of the device.

Abstract: The present invention relates to a method for validating the correct logical function and timing behavior of a digital circuit design within a cycle-based verification environment. The method comprises the steps of providing a VHDL description of the digital circuit design, performing a logic synthesis, wherein the VHDL description is turned into a design implementation in terms of logic gates, and creating a netlist including the elements of the digital circuit design and the connections between said elements. The method comprises the further steps of providing a transformation script with at least one transparent storage element, wherein said transparent storage element represents a path delay within the digital circuit design, creating a new netlist with the at least one transparent storage elements, running a verification, and checking if the new netlist is clean from a logical and timing point of view.

Abstract: The method enables authentication data to be communicated and checked between a transponder device (1) and a reader unit (2) of a vehicle in order to authorize access to the vehicle. The device includes a logic circuit (11), a non-volatile memory (13), an encryption and/or decryption circuit (12) and a first transmission and reception module (14, 16) of data signals (SD). The reader unit includes a microprocessor unit (21), a memory (22), a random number generator (24) and a second module (23, 25) for transmitting and receiving data signals (SD). A random number (RN1) generated in the reader unit is transmitted with a first encrypted function obtained using the random number and a secret key. The transponder device receives the random number and the first encrypted function. A new first encrypted function is calculated in the transponder device using a secret key identical to the secret key of the reader unit. This new first function is compared with the first received encrypted function.

Abstract: A data transfer interface system is provided that directly transfers data from one data storage drive to another data storage drive under the control of a host. The host and data storage drives are jointly connected to one another with data lines and control lines. Each data storage drive is connected separately to the host with a read/write command line. The host initializes the data storage drives providing initialization data to the drives where the data may include position information and commend information. After initialization, the host concurrently instructs one data storage drive to read the data from the drive while the other data storage drive writes the data to memory.

Abstract: A method for simulating an operation of a digital circuit (01) is described. The method utilizes cycle simulation, wherein in a cycle based simulation model (34) of the digital circuit (01) components (02, 03, 04, 05) of the digital circuit (01) are clocked synchronously every cycle (19) of a functional clock (Clk). According to the invention, real digital circuit (01), i.e. chip or combinatorial logic (01), timing information is included in the cycle simulation by inserting delay latches (15, 16, 17) into the cycle based simulation model (34) of the digital circuit (01), wherein a non-functional clock (Sim clock) is used to clock the delay latches (15, 16, 17), so that each delay latch (15, 16, 17) delays the propagation of a signal (I, J, K) by a cycle (20) of the non-functional clock (Sim clock).

Abstract: The present invention relates to a method for validating the correct logical function and timing behavior of a digital circuit design within a cycle-based verification environment. Said method comprises the steps of providing (10) a VHDL description of the digital circuit design, performing (12) a logic synthesis, wherein the VHDL description is turned into a design implementation in terms of logic gates, and creating (14) a netlist including the elements of the digital circuit design and the connections between said elements. Said method comprises the further steps of providing (28) a transformation script with at least one transparent storage element (40; 54), wherein said transparent storage element (40; 54) represents a path delay within the digital circuit design, creating (30) a new netlist with the at least one transparent storage elements (40; 54), running (20) a verification, and checking, if the new netlist is clean from a logical and timing point of view.

Abstract: The portable electronic device (1) allows functions and/or data of a vehicle to be controlled and managed. In order to do this, the portable device comprises, in a casing having an upper part (10) fixed, for example, in a removable manner on a lower part (11), means for wirelessly transmitting and receiving signals for short range personalised communication with the vehicle. It further comprises a microprocessor unit for processing functions and/or data of the device and of the vehicle, at least one display screen (3) having a portion which is visible from outside the casing for displaying different menus or data of the device or of the vehicle, and manual control means (5, 6) for controlling the execution of functions of the microprocessor unit. A power source, such as a battery, is provided in the casing for supplying electric power to all the electronic components of the device.

Abstract: The method enables authentication data to be communicated and checked between a transponder device (1) and a reader unit (2) of a vehicle in order to authorise access to the vehicle. The device includes a logic circuit (11), a non-volatile memory (13), an encryption and/or decryption circuit (12) and a first transmission and reception module (14, 16) of data signals (SD). The reader unit includes a microprocessor unit (21), a memory (22), a random number generator (24) and a second module (23, 25) for transmitting and receiving data signals (SD). A random number (RN1) generated in the reader unit is transmitted with a first encrypted function obtained using the random number and a secret key. The transponder device receives the random number and the first encrypted function. A new first encrypted function is calculated in the transponder device using a secret key identical to the secret key of the reader unit. This new first function is compared with the first received encrypted function.