Patents by Inventor Volodymyr A. Muratov

Volodymyr A. Muratov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6919715
    Abstract: A DC/DC converter 100 has a DAC 40 that receives a code associated with desired processor operating voltage and sets the reference voltage on its output 41. The reference voltage (VDAC) is boosted by the buffer amplifier 42 to center the droop along the median load. A sensed current signal ICS 22 is proportional to the load current Io 24 and can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain Gc. A droop control feedback circuit includes an error amplifier 50. It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency FCPU max and transformed to the current IDROOP 32 that creates the voltage drop across the resistor R1. The other input is coupled to the buffer amplifier output.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: July 19, 2005
    Assignee: Intersil Corporation
    Inventors: Volodymyr A. Muratov, Michael Coletta, Wlodzimerz S. Wiktor
  • Publication number: 20040090217
    Abstract: A DC/DC converter 100 has a DAC 40 that receives a code associated with desired processor operating voltage and sets the reference voltage on its output 41. The reference voltage (VDAC) is boosted by the buffer amplifier 42 to center the droop along the median load. A sensed current signal ICS 22 is proportional to the load current Io 24 and can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain Gc. A droop control feedback circuit includes an error amplifier 50. It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency FCPU max and transformed to the current IDROOP 32 that creates the voltage drop across the resistor R1. The other input is coupled to the buffer amplifier output.
    Type: Application
    Filed: September 23, 2003
    Publication date: May 13, 2004
    Applicant: INTERSIL CORPORATION
    Inventors: Volodymyr A. Muratov, Michael Coletta, Wlodzimerz S. Wiktor
  • Patent number: 6680604
    Abstract: A DC/DC converter 100 has a DAC 40 that receives a code associated with desired processor operating voltage and sets the reference voltage on its output 41. The reference voltage (VDAC) is boosted by the buffer amplifier 42 to center the droop along the median load. A sensed current signal ICS 22 is proportional to the load current Io 24 and can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain Gc. A droop control feedback circuit includes an error amplifier 50. It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency FCPU max and transformed to the current IDROOP 32 that creates the voltage drop across the resistor R1. The other input is coupled to the buffer amplifier output.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: January 20, 2004
    Assignee: Intersil Corporation
    Inventors: Volodymyr A. Muratov, Michael Coletta, Wlodzimerz S. Wiktor
  • Patent number: 6621256
    Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: September 16, 2003
    Assignee: Intersil Corporation
    Inventors: Volodymyr A. Muratov, Robert G. Hodgins, Thomas A. Jochum
  • Publication number: 20020194516
    Abstract: An electronic system 100 controls power to its central processing unit 22 with digital voltage identification (VID) codes and analog set signals. The VID codes are converted into an analog VID signal by digital to analog converter 42. An analog set voltage 62 generated by a sense network 60 sets the voltage level when the CPU operates at any voltage less than its maximum. Comparator 50 and switch 52 select either the analog VID voltage or the analog set voltage.
    Type: Application
    Filed: September 10, 2001
    Publication date: December 19, 2002
    Inventors: Volodymyr A. Muratov, Robert G. Hodgins
  • Publication number: 20020158613
    Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.
    Type: Application
    Filed: March 7, 2002
    Publication date: October 31, 2002
    Applicant: INTERSIL CORPORATION
    Inventors: Volodymyr A. Muratov, Robert G. Hodgins, Thomas A. Jochum
  • Patent number: 6433525
    Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: August 13, 2002
    Assignee: Intersil Americas Inc.
    Inventors: Volodymyr A. Muratov, Robert G. Hodgins, Thomas A. Jochum
  • Publication number: 20010045815
    Abstract: A DC/DC converter 100 has a DAC 40 that receives a code associated with desired processor operating voltage and sets the reference voltage on its output 41. The reference voltage (VDAC) is boosted by the buffer amplifier 42 to center the droop along the median load. A sensed current signal ICS 22 is proportional to the load current Io 24 and can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain Gc. A droop control feedback circuit includes an error amplifier 50. It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency FCPU max and transformed to the current IDROOP 32 that creates the voltage drop across the resistor R1. The other input is coupled to the buffer amplifier output.
    Type: Application
    Filed: February 22, 2001
    Publication date: November 29, 2001
    Inventors: Volodymyr A. Muratov, Michael Coletta, Wlodzimerz S. Wiktor
  • Publication number: 20010035745
    Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.
    Type: Application
    Filed: May 1, 2001
    Publication date: November 1, 2001
    Inventors: Volodymyr A. Muratov, Robert G. Hodgins, Thomas A. Jochum