Abstract: A band-gap circuit for generating a bandgap reference signal includes a first bipolar transistor and a second bipolar transistor of a same type among PNP and NPN types. The first and second bipolar transistors are configured to generate a current varying proportionally with the temperature. A capacitor is connected between a base and an emitter of one or both of the first and second bipolar transistors.

Abstract: A power conversion circuit includes a first node configured to receive a first voltage referenced to a second node configured to be coupled to a reference potential. A first power converter couples the first node to a third node. A second power converter couples a fourth node to an output node. A first capacitor couples the third node to the fourth node. A first switch connects the output node to the first node. An output switch connects the output node to a load.

Abstract: A circuit includes a current source, a differential pair of transistors coupled to the current source, an active load, and a current injection circuit. The differential pair of transistors has a first offset voltage and an input transconductance. The current injection circuit is configured to supply a first current and a second current to produce a second offset voltage across the differential pair of transistors opposite the first offset voltage. The first current and the second current has a same thermal dependence as the input transconductance of the differential pair of transistors.

Abstract: A differential pair circuit includes a first branch and a second branch having a common first node. Each of the first and second branches includes at least one transistor having a conduction node directly connected to the common first node. A third branch couples the common first node to a power supply node. The third branch includes a current source in series with a resistive element.

Abstract: In an embodiment, a circuit includes a first branch coupled between a first node and a second node, the first branch including a first ceramic capacitor, the first ceramic capacitor including terminals configured to receive a first voltage applied therebetween. The circuit further includes a second branch coupled between the first node and a third node, the second branch including a second ceramic capacitor that is substantially identical to the first ceramic capacitor, the second ceramic capacitor including terminals configured to receive a second voltage applied therebetween. The circuit further includes a control circuit configured to modify the second voltage until a first current passing through the second node is substantially equal to a second current passing through the third node.

Abstract: In an embodiment a power converter includes a first capacitor and a second capacitor coupled in series with the first capacitor, wherein the converter is configured to charge, during a first phase, the first and second capacitors by a supply voltage so that a voltage across terminals of each of the first and second capacitors is substantially equal to half the supply voltage and discharge, during a second phase, the second capacitor to a third capacitor.

Abstract: A power conversion circuit includes a first branch having a first switch and a second switch electrically connected to each other in series between a first node and a second node. An inductive element has a first terminal connected to a mid-point of the first and second switches. A capacitor has a first electrode coupled to the first node. A third node is configured to receive a first voltage, and the first voltage is referenced to the second node. A third switch is configured to electrically connect the third node to a second terminal of the inductive element.

Abstract: A circuit can be used for reading out a light sensor. The circuit includes an operational amplifier. A first capacitor has a first electrode coupled to an inverting input of the operational amplifier and a second electrode coupled to a non-inverting output of the operational amplifier. A compensation circuit is coupled between the operational amplifier and the first capacitor. A preset circuit has an input coupled to a first voltage node and an output coupled to the first capacitor. The first voltage node configured to carry a first voltage equal to a preset voltage multiplied by a coefficient.

Abstract: An integrated circuit includes a temperature-independent voltage generating circuit configured to generate a bandgap voltage by summing a voltage proportional to absolute temperature and a voltage complementary to absolute temperature, a temperature threshold detection circuit including a resistive voltage divider bridge configured to generate a reference voltage equal to a fraction of the bandgap voltage and a comparator circuit configured to compare the voltage proportional to absolute temperature with the reference voltage.

Abstract: In an embodiment a device includes an input node configured to receive a first current, an output node configured to provide a second current determined by the first current, a first resistor having a first terminal connected to the input node and a second terminal coupled to a first node configured to receive a first supply voltage, a first MOS transistor having a source connected to the first node and a drain coupled to the output node of the device, a second resistor having a first terminal connected to a gate of the first MOS transistor, a biasing circuit configured to provide a biasing voltage on a second terminal of the second resistor and a first capacitor connected between the input node and the gate of the first MOS transistor.

Abstract: The present disclosure relates to a device comprising a first transimpedance amplifier comprising a first amplification stage with a first MOS transistor, a second transimpedance amplifier comprising a second amplification stage with a second MOS transistor, and a current source series-connected with the first and second amplification stages, the current source having a first terminal coupled to the drain of the first MOS transistor and a second terminal coupled to the drain of the second MOS transistor.

Abstract: The present disclosure is directed to a light-signal communication receiver device including a photo-receiving diode configured to generate a current signal on a first node from a received light signal, a preamplifier configured to convert the current signal on the first node into a voltage signal on a second node, and a differential amplifier including a first input connected to the first node and a second input connected to a third node coupled to the second node via an adjustment circuit. The adjustment circuit is configured to offset the level of the voltage signal of the second node, on the third node, in a controlled manner by a control signal.

Abstract: In an embodiment, a circuit includes a first branch coupled between a first node and a second node, the first branch including a first ceramic capacitor, the first ceramic capacitor including terminals configured to receive a first voltage applied therebetween. The circuit further includes a second branch coupled between the first node and a third node, the second branch including a second ceramic capacitor that is substantially identical to the first ceramic capacitor, the second ceramic capacitor including terminals configured to receive a second voltage applied therebetween. The circuit further includes a control circuit configured to modify the second voltage until a first current passing through the second node is substantially equal to a second current passing through the third node.

Abstract: A band-gap circuit for generating a bandgap reference signal includes a first bipolar transistor and a second bipolar transistor of a same type among PNP and NPN types. The first and second bipolar transistors are configured to generate a current varying proportionally with the temperature. A capacitor is connected between a base and an emitter of one or both of the first and second bipolar transistors.

Abstract: In an embodiment a power converter includes a first capacitor and a second capacitor coupled in series with the first capacitor, wherein the converter is configured to charge, during a first phase, the first and second capacitors by a supply voltage so that a voltage across terminals of each of the first and second capacitors is substantially equal to half the supply voltage and discharge, during a second phase, the second capacitor to a third capacitor.

Abstract: A power stage of a voltage converter, including: a series capacitor having a first terminal coupled to a first switch node; a pair of second high-side switches coupled in series between a second switch node and a second terminal of the series capacitor; and a bias switch coupled between the first switch node and a middle node between the second high-side switches, wherein during operation, a voltage across each of the second high-side switches and the bias switch is less than a supply voltage.

Abstract: A power stage of a voltage converter, including: a series capacitor having a first terminal coupled to a first switch node; a pair of second high-side switches coupled in series between a second switch node and a second terminal of the series capacitor; and a bias switch coupled between the first switch node and a middle node between the second high-side switches, wherein during operation, a voltage across each of the second high-side switches and the bias switch is less than a supply voltage.

Abstract: A circuit having a power converter configured to convert an input voltage to an output voltage; a controller having an inner loop configured to regulate a peak inductor current of an inductor of the power converter to a reference peak inductor current value; and an inductor value measurement circuit configured to determine a value of the inductor based on the output voltage of the power converter and the reference peak inductor current value.

Abstract: A power stage having a power transistor coupled between a power supply and a switching node; a charge pump coupled between the power supply and a gate of the power transistor; and a gate driver configured to charge the gate of the power transistor until the gate voltage reaches a predefined voltage, and further charge the gate of the power transistor from the charge pump.

Abstract: A power stage having a power transistor coupled between a power supply and a switching node; a charge pump coupled between the power supply and a gate of the power transistor; and a gate driver configured to charge the gate of the power transistor until the gate voltage reaches a predefined voltage, and further charge the gate of the power transistor from the charge pump.