Patents by Inventor Vu A. Vu
Vu A. Vu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20160181096Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed laser to produce a p-doped germanium seed layer. At this point, a bulk germanium layer can be grown on top of the doped germanium seed layer.Type: ApplicationFiled: March 1, 2016Publication date: June 23, 2016Inventors: Daniel N. Carothers, Craig M. Hill, Andrew TS Pomerene, Vu An Vu
-
Patent number: 9316790Abstract: A waveguide having a substrate, a first germanium sidewall and a second germanium sidewall. The waveguide is formed by growing the first germanium sidewall and second germanium sidewall on the substrate.Type: GrantFiled: June 9, 2015Date of Patent: April 19, 2016Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Robert L. Kamocsai, Vu A. Vu
-
Patent number: 9305779Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed layer to produce a p-doped germanium seed layer. At this point, a bulk germanium layer can be grown on top of the doped germanium seed layer.Type: GrantFiled: August 11, 2009Date of Patent: April 5, 2016Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu
-
Patent number: 9196764Abstract: A method for manufacturing a photodetector including growing a quantity of germanium within an optical pathway of a waveguide. The detection of a current caused by an interaction between the optical signal and the germanium is used to indicate the presence of an optical signal passing through the waveguide.Type: GrantFiled: June 4, 2015Date of Patent: November 24, 2015Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Andrew TS Pomerene, Vu A. Vu, Robert L. Kamocsai
-
Publication number: 20150277045Abstract: A waveguide having a substrate, a first germanium sidewall and a second germanium sidewall. The waveguide is formed by growing the first germanium sidewall and second germanium sidewall on the substrate.Type: ApplicationFiled: June 9, 2015Publication date: October 1, 2015Inventors: Robert L. KAMOCSAI, Vu A. VU
-
Publication number: 20150270414Abstract: A method for manufacturing a photodetector including growing a quantity of germanium within an optical pathway of a waveguide. The detection of a current caused by an interaction between the optical signal and the germanium is used to indicate the presence of an optical signal passing through the waveguide.Type: ApplicationFiled: June 4, 2015Publication date: September 24, 2015Inventors: Andrew TS POMERENE, Vu A. VU, Robert L. KAMOCSAI
-
Patent number: 9116290Abstract: A waveguide having a substrate, a first germanium sidewall and a second germanium sidewall. The waveguide is formed by growing the first germanium sidewall and second germanium sidewall on the substrate.Type: GrantFiled: October 8, 2012Date of Patent: August 25, 2015Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Robert L. Kamocsai, Vu A. Vu
-
Patent number: 9105772Abstract: A method for manufacturing a photodetector including growing a quantity of germanium within an optical pathway of a waveguide. The detection of a current caused by an interaction between the optical signal and the germanium is used to indicate the presence of an optical signal passing through the waveguide.Type: GrantFiled: July 29, 2013Date of Patent: August 11, 2015Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Andrew T S Pomerene, Vu A. Vu, Robert L. Kamocsai
-
Publication number: 20150017788Abstract: A system and method for growing polycrystalline silicon-germanium film that includes mixing a GeH4 gas and a SiH4 gas to coat and grow polycrystalline silicon-germanium film on a silicon wafer. The GeH4 gas and the SiH4 gas are also heated and the pressure around the wafer is reduced to at least 2.5*10?3 mBar to produce the polycrystalline silicon-germanium film. The polycrystalline silicon-germanium film is then annealed to improve its resistivity.Type: ApplicationFiled: July 10, 2014Publication date: January 15, 2015Inventor: Vu A. Vu
-
Publication number: 20140029892Abstract: A method for manufacturing a photodetector including growing a quantity of germanium within an optical pathway of a waveguide. The detection of a current caused by an interaction between the optical signal and the germanium is used to indicate the presence of an optical signal passing through the waveguide.Type: ApplicationFiled: July 29, 2013Publication date: January 30, 2014Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Andrew TS POMERENE, Vu A. VU, Robert L. KAMOCSAI
-
Patent number: 8343792Abstract: An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers.Type: GrantFiled: October 27, 2008Date of Patent: January 1, 2013Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu, Robert Kamocsai, Timothy J. Conway
-
Publication number: 20120304919Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium, seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed layer to produce a p-doped germanium seed layer. At this point, a hulk germanium layer can be grown on top of the doped germanium seed layer.Type: ApplicationFiled: August 15, 2012Publication date: December 6, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T.S. Pomerene, Vu A. Vu
-
Publication number: 20120252158Abstract: An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers.Type: ApplicationFiled: October 27, 2008Publication date: October 4, 2012Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu, Robert Kamocsai, Timothy J. Conway
-
Patent number: 7927979Abstract: Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.Type: GrantFiled: October 27, 2010Date of Patent: April 19, 2011Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Craig M. Hill, Andrew T S Pomerene, Daniel N. Carothers, Timothy J. Conway, Vu A. Vu
-
Publication number: 20110039388Abstract: Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.Type: ApplicationFiled: October 27, 2010Publication date: February 17, 2011Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Craig M. HILL, Andrew TS POMERENE, Daniel N. CAROTHERS, Timothy J. CONWAY, Vu A. VU
-
Publication number: 20110036289Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed layer to produce a p-doped germanium seed layer. At this point, a bulk germanium layer can be grown on top of the doped germanium seed layer.Type: ApplicationFiled: August 11, 2009Publication date: February 17, 2011Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T.S. Pomerene, Vu A. Vu
-
Patent number: 7847353Abstract: Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.Type: GrantFiled: December 5, 2008Date of Patent: December 7, 2010Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Craig M. Hill, Andrew T. Pomerene, Daniel N. Carothers, Timothy J. Conway, Vu A. Vu
-
Patent number: 7811844Abstract: A method for fabricating photonic and electronic devices on a substrate is disclosed. Multiple slabs are initially patterned and etched on a layer of a substrate. An electronic device is fabricated on a first one of the slabs and a photonic device is fabricated on a second one of the slabs, such that the electronic device and the photonic device are formed on the same layer of the substrate.Type: GrantFiled: August 29, 2008Date of Patent: October 12, 2010Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Timothy J. Conway, Rick L. Thompson, Vu A. Vu, Robert Kamocsai, Joe Giunta, Jonathan N. Ishii
-
Patent number: 7736934Abstract: An improved method for manufacturing a vertical germanium detector is disclosed. Initially, a detector window is opened through an oxide layer on a single crystalline substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished and removed until only a portion of the amorphous germanium layer is located around the single crystal germanium layer. A tetraethyl orthosilicate (TEOS) layer is deposited on the amorphous germanium layer and the single crystal germanium layer. An implant is subsequently performed on the single crystal germanium layer. After an oxide window has been opened on the TEOS layer, a titanium layer is deposited on the single crystal germanium layer to form a vertical germanium detector.Type: GrantFiled: October 20, 2008Date of Patent: June 15, 2010Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu, Joe Giunta, Jonathan N. Ishii
-
Publication number: 20100140708Abstract: Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.Type: ApplicationFiled: December 5, 2008Publication date: June 10, 2010Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.Inventors: Craig M. Hill, Andrew T. Pomerene, Daniel N. Carothers, Timothy J. Conway, Vu A. Vu