Patents by Inventor V. V. Shyam Prasad

V. V. Shyam Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10971939
    Abstract: A cell balancing system includes sensing circuitry configured to sense a cell voltage of each of a plurality of cells of a battery. Cell balancing circuitry is configured to balance each of the plurality of cells in response to a respective cell balancing command for each of the plurality of cells. A comparison circuit configured to compare the sensed cell voltages for each of the plurality of cells to an adaptive threshold voltage. The comparison circuit generates a respective cell state for each of the plurality of cells to indicate a state of the respective cell voltage for each of the plurality of cells relative to the adaptive threshold voltage. A controller is configured to set the respective cell balancing command for each of the plurality of cells and to adjust the adaptive threshold voltage based on an evaluation of the cell states for the plurality of cells.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: April 6, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manish Parmar, V V Shyam Prasad, Dipankar Mitra, Mahesh K V
  • Patent number: 10778006
    Abstract: A battery system includes a position detector configured to detect whether a first battery protector is coupled to a second power rail and positioned at a bottom of a stack. A cell balancing input (CBI) is coupled to receive a CBI signal to enable or disable cell balancing of the first battery protector. A cell balancing output (CBO) enables cell balancing of a second protector in the stack.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: September 15, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manish Parmar, V V Shyam Prasad, Abhijeet Kumar Singh
  • Publication number: 20200185932
    Abstract: A cell balancing system includes sensing circuitry configured to sense a cell voltage of each of a plurality of cells of a battery. Cell balancing circuitry is configured to balance each of the plurality of cells in response to a respective cell balancing command for each of the plurality of cells. A comparison circuit configured to compare the sensed cell voltages for each of the plurality of cells to an adaptive threshold voltage. The comparison circuit generates a respective cell state for each of the plurality of cells to indicate a state of the respective cell voltage for each of the plurality of cells relative to the adaptive threshold voltage. A controller is configured to set the respective cell balancing command for each of the plurality of cells and to adjust the adaptive threshold voltage based on an evaluation of the cell states for the plurality of cells.
    Type: Application
    Filed: February 12, 2020
    Publication date: June 11, 2020
    Inventors: Manish Parmar, V V Shyam Prasad, Dipankar Mitra, Mahesh KV
  • Publication number: 20200099222
    Abstract: A battery system includes a position detector configured to detect whether a first battery protector is coupled to a second power rail and positioned at a bottom of a stack. A cell balancing input (CBI) is coupled to receive a CBI signal to enable or disable cell balancing of the first battery protector. A cell balancing output (CBO) enables cell balancing of a second protector in the stack.
    Type: Application
    Filed: October 12, 2018
    Publication date: March 26, 2020
    Inventors: Manish PARMAR, V V Shyam PRASAD, Abhijeet Kumar SINGH
  • Patent number: 7581131
    Abstract: A method for balancing clock trees in a multi-voltage synchronous digital environment is provided that includes generating a first source clock signal in a first voltage domain based on a first mirrored clock signal in a second voltage domain. Similarly, a second source clock signal is generated in the second voltage domain based on a second mirrored clock signal in the first voltage domain.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: August 25, 2009
    Assignee: National Semiconductor Corporation
    Inventors: V. V. Shyam Prasad, Ganapathi Hegde