Abstract: Systems, methods, and computer-readable media for enabling a power efficient stylus for an electronic device are provided. Various components may be provided for providing such a stylus with mechanical sensitivity.

Abstract: A device includes a button, a set of force sensors coupled with the button, a haptic engine coupled to with the button, and control circuitry, where the control circuitry is configured to control operation of the device according to a first mode of operation during a first time duration to detect user force applied to the button via signals from the set of force sensors, and control the device according to a second mode of operation during a second time duration for closed loop control of haptic feedback to the button via the haptic engine and the set of force sensors.

Abstract: An input device comprising: a printed circuit board (PCB) comprising non-linear circuitry; resistive circuitry including a force-sensitive resistor (FSR) coupled to the PCB in parallel with the non-linear circuitry; and a hinge coupled to the PCB and the FSR configured to strain the FSR in response to a force applied to a tip of the input device.

Abstract: In some examples, a touch and force sensitive device includes integrated circuitry configured to attenuate noise in a first period of operation, and sense force of an object contacting the device in a second period of operation. In some examples, a touch and force sensitive device includes integrated circuitry formed from a same material layer, the material layer configured to detect a force of an object contacting the device in first one or more regions of the material layer, and configured to couple touch detection circuitry in second one or more regions of the material layer.

Abstract: An electronic device has a keyboard with an internal membrane. The membrane has a set of strain gauges configured to respond to a key press, such as when a collapsible dome collapses into contact with the membrane. The strain gauges are connected in a half Wheatstone bridge configuration and are positioned on the membrane in order to limit effects of temperature and subtle flexure of the membrane. The strain gauges are also configured to magnify detection of a resistance differential when a keycap is pressed with sufficient force.

Abstract: An electronic device has a keyboard with an internal membrane. The membrane has a set of strain gauges configured to respond to a key press, such as when a collapsible dome collapses into contact with the membrane. The strain gauges are connected in a half Wheatstone bridge configuration and are positioned on the membrane in order to limit effects of temperature and subtle flexure of the membrane. The strain gauges are also configured to magnify detection of a resistance differential when a keycap is pressed with sufficient force.

Abstract: An input device comprising: a printed circuit board (PCB) comprising non-linear circuitry; resistive circuitry including a force-sensitive resistor (FSR) coupled to the PCB in parallel with the non-linear circuitry; and a hinge coupled to the PCB and the FSR configured to strain the FSR in response to a force applied to a tip of the input device.

Abstract: An electronic device has a keyboard with an internal membrane. The membrane has a set of strain gauges configured to respond to a key press, such as when a collapsible dome collapses into contact with the membrane. The strain gauges are connected in a half Wheatstone bridge configuration and are positioned on the membrane in order to limit effects of temperature and subtle flexure of the membrane. The strain gauges are also configured to magnify detection of a resistance differential when a keycap is pressed with sufficient force.

Abstract: An embodiment includes an apparatus comprising: first and second semiconductor fins that are parallel to each other; a first gate, on the first fin, including a first gate portion between the first and second fins; a second gate, on the second fin, including a second gate portion between the first and second fins; a first oxide layer extending along a first face of the first gate portion, a second oxide layer extending along a second face of the second gate portion, and a third oxide layer connecting the first and second oxide layers to each other; and an insulation material between the first and second gate portions; wherein the first, second, and third oxide layers each include an oxide material and the insulation material does not include the oxide material. Other embodiments are described herein.

Abstract: An electronic device has a keyboard with an internal membrane. The membrane has a set of strain gauges configured to respond to a key press, such as when a collapsible dome collapses into contact with the membrane. The strain gauges are connected in a half Wheatstone bridge configuration and are positioned on the membrane in order to limit effects of temperature and subtle flexure of the membrane. The strain gauges are also configured to magnify detection of a resistance differential when a keycap is pressed with sufficient force.

Abstract: An embodiment includes an apparatus comprising: first and second semiconductor fins that are parallel to each other; a first gate, on the first fin, including a first gate portion between the first and second fins; a second gate, on the second fin, including a second gate portion between the first and second fins; a first oxide layer extending along a first face of the first gate portion, a second oxide layer extending along a second face of the second gate portion, and a third oxide layer connecting the first and second oxide layers to each other; and an insulation material between the first and second gate portions; wherein the first, second, and third oxide layers each include an oxide material and the insulation material does not include the oxide material. Other embodiments are described herein.

Abstract: An embodiment includes an apparatus comprising: first and second semiconductor fins that are parallel to each other; a first gate, on the first fin, including a first gate portion between the first and second fins; a second gate, on the second fin, including a second gate portion between the first and second fins; a first oxide layer extending along a first face of the first gate portion, a second oxide layer extending along a second face of the second gate portion, and a third oxide layer connecting the first and second oxide layers to each other; and an insulation material between the first and second gate portions; wherein the first, second, and third oxide layers each include an oxide material and the insulation material does not include the oxide material. Other embodiments are described herein.

Abstract: An embodiment includes a system comprising: a first gate and a first contact that correspond to a transistor and are on a first fin; a second gate and a second contact that correspond to a transistor and are on a second fin; an interlayer dielectric (ILD) collinear with and between the first and second contacts; wherein (a) the first and second gates are collinear and the first and second contacts are collinear; (b) the ILD includes a recess that comprises a cap layer including at least one of an oxide and a nitride. Other embodiments are described herein.

Abstract: An embodiment includes an apparatus comprising: first and second semiconductor fins that are parallel to each other; a first gate, on the first fin, including a first gate portion between the first and second fins; a second gate, on the second fin, including a second gate portion between the first and second fins; a first oxide layer extending along a first face of the first gate portion, a second oxide layer extending along a second face of the second gate portion, and a third oxide layer connecting the first and second oxide layers to each other; and an insulation material between the first and second gate portions; wherein the first, second, and third oxide layers each include an oxide material and the insulation material does not include the oxide material. Other embodiments are described herein.

Abstract: An embodiment includes a system comprising: a first gate and a first contact that correspond to a transistor and are on a first fin; a second gate and a second contact that correspond to a transistor and are on a second fin; an interlayer dielectric (ILD) collinear with and between the first and second contacts; wherein (a) the first and second gates are collinear and the first and second contacts are collinear; (b) the ILD includes a recess that comprises a cap layer including at least one of an oxide and a nitride. Other embodiments are described herein.