Patents by Inventor W. David Dougherty

W. David Dougherty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6697880
    Abstract: A template for a logic synthesis command script is broken into smaller and functionally independent templates termed “micro-templates.” Using micro-templates, logic synthesis time may be significantly reduced. Each micro-template may correspond to a particular synthesis operation and may be enabled or disabled. Where synthesis of a particular set of synthesis operations is desired, the micro-templates corresponding to those synthesis operations are enabled.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: February 24, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: W. David Dougherty
  • Patent number: 6370575
    Abstract: A web-based tool is provided for unifying submission of reports and other communications between disciplines of an organization. The tool provides weekly reports, submissions by discipline and issue, and automatic report creation, with email notification to management team members. A flexible scheme allows deployment on multiple projects without significant changes in software, because of its parameterized design.
    Type: Grant
    Filed: January 8, 1999
    Date of Patent: April 9, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: W. David Dougherty, Steve F. Hejl, Louis R. Stott
  • Patent number: 6341361
    Abstract: A graphical user interface (GUI) provides a design engineer the capability of automatically inserting scan logic and test logic into a design. The graphical user interface includes a scan insertion option for a design engineer to invoke a scan insertion tool to check the design for testability. The graphical user interface also permits the design engineer to invoke a test generation tool such as an automatic test pattern generator (ATPG) tool to check the design for fault coverage. The graphical user interface, which can serve as a front end for a design framework, enables a design engineer to efficiently increase testability while still in a design phase.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: January 22, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Luis A. Basto, W. David Dougherty