Abstract: Some embodiments of the inventive subject matter include a computer program product for validating a test thermoreflective mark. The computer program product can include computer usable program code configured to control a temperature regulation unit configured to govern a temperature of a thermoreflective mark. The computer usable program code can be further configured to control an electromagnetic waver emitter to present at a first temperature, a first electromagnetic wave. The computer usable program code can be further configured to record a first reflective profile. The computer usable program code can be further configured to control the electromagnetic wave emitter to present at a second temperature, a second electromagnetic wave. The computer usable program code can be further configured to record a second reflective profile. The computer usable code can be further configured to validate the thermoreflective mark based on the first reflective profile and the second reflective profile.

Abstract: An integrated circuit includes an LBIST controller operative to run a test program on at least one selection of core logic of the integrated circuit to test the operability of the at least one selection of core logic. The integrated circuit also includes a monitoring logic structure operative to detect at least one type of operation executed for the test program from at least one particular control signal activated by the LBIST controller for controlling the at least one selection of core logic to execute the test program from among at least one control signal for controlling operations on the at least one selection of core logic.

Abstract: A mechanism is provided for identifying a failing latch within an integrated circuit device. A test sequence is initiated on a set of scan chains associated with an identified failing multiple input signature register. For each test portion in a set of test portions in the test sequence, a comparison is performed between an output of the multiple input signature register and a corresponding value in a set of expected values. Responsive to determining a match, a value of a counter is incremented. Responsive to a failure to match, incrementing of the counter is stopped, and the value of the counter providing an indication of the failing latch in the integrated circuit device is read out.

Abstract: An anti-counterfeiting technique presents, to a test thermoreflective mark at a first temperature, a first electromagnetic wave. A first test reflective profile for the test thermoreflective mark associated with the first temperature is recorded. A second electromagnetic wave is presented to the test thermoreflective mark at a second temperature. A second test reflective profile for the test thermoreflective mark associated with the second temperature is recorded. The first test reflective profile is compared with a first control reflective profile that is associated with a genuine thermoreflective mark. The second test reflective profile is compared with a second control reflective profile that is associated with the genuine thermoreflective mark.

Abstract: Some embodiments of the inventive subject matter include a computer program product for validating a test thermoreflective mark. The computer program product can include computer usable program code configured to control a temperature regulation unit configured to govern a temperature of a thermoreflective mark. The computer usable program code can be further configured to control an electromagnetic waver emitter to present at a first temperature, a first electromagnetic wave. The computer usable program code can be further configured to record a first reflective profile. The computer usable program code can be further configured to control the electromagnetic wave emitter to present at a second temperature, a second electromagnetic wave. The computer usable program code can be further configured to record a second reflective profile. The computer usable code can be further configured to validate the thermoreflective mark based on the first reflective profile and the second reflective profile.

Abstract: The present invention provides systems and methods for enabling a customer to sample content and select content for purchasing while the customer is in a retail store. Advantageously, the customer may be given one or more options for the delivery of the content.

Abstract: An integrated circuit includes an LBIST controller operative to run a test program on at least one selection of core logic of the integrated circuit to test the operability of the at least one selection of core logic. The integrated circuit also includes a monitoring logic structure operative to detect at least one type of operation executed for the test program from at least one particular control signal activated by the LBIST controller for controlling the at least one selection of core logic to execute the test program from among at least one control signal for controlling operations on the at least one selection of core logic.

Abstract: Embodiments of the present invention enable a user to acquire an item (e.g., a digital song, digital video, etc.) using one device (e.g., a portable device) and to easily move a copy of the acquired item from the one device to another device so that a user of the other device can play the item.

Abstract: An embodiment of the current disclosure is directed to a Static Random Access Memory (SRAM) device, and a design structure for the SRAM device. The SRAM device may include one or more SRAM cells. Each SRAM cell may further include a first and a second CMOS inverter that are cross-coupled. The first and second CMOS inverters may each have a first switch and a second switch. The SRAM device may also include a reset circuit. The reset circuit may be coupled to a first node of the first switch of the first CMOS inverter. The reset circuit may drive the first CMOS inverter to output a logical high signal in a reset mode.

Abstract: A product sampling and recommendation system uses customer profile data and/or real-time information from a point-of-sale system to tailor specific product recommendations to a customer using a sampling station.

Abstract: A semiconductor chip and method for diagnostic testing of combinational logic in a logic and array system including Logic Built in Self Test (LBIST) diagnostics are provided. The semiconductor chip includes a logic and array system, an LBIST system, a clocking module, and an addressing module. The method for diagnostic testing includes providing an initialization pattern to an array in the logic and array system, applying a diagnostic control setup, and running the diagnostic test. The diagnostic control setup includes firing a clock every diagnostic test clock cycle and selecting an address from a subset of an address space.

Abstract: A mechanism is provided for identifying a failing latch within an integrated circuit device. A test sequence is initiated on a set of scan chains associated with an identified failing multiple input signature register. For each test portion in a set of test portions in the test sequence, a comparison is performed between an output of the multiple input signature register and a corresponding value in a set of expected values. Responsive to determining a match, a value of a counter is incremented. Responsive to a failure to match, incrementing of the counter is stopped, and the value of the counter providing an indication of the failing latch in the integrated circuit device is read out.

Abstract: The present invention provides systems and methods for enabling a customer to sample content and select content for purchasing while the customer is in a retail store. Advantageously, the customer may be given one or more options for the delivery of the content.

Abstract: An integrated circuit includes an LBIST controller operative to run a test program on at least one selection of core logic of the integrated circuit to test the operability of the at least one selection of core logic. The integrated circuit also includes a monitoring logic structure operative to detect at least one type of operation executed for the test program from at least one particular control signal activated by the LBIST controller for controlling the at least one selection of core logic to execute the test program from among at least one control signal for controlling operations on the at least one selection of core logic.

Abstract: An integrated circuit includes an LBIST controller operative to run a test program on at least one selection of core logic of the integrated circuit to test the operability of the at least one selection of core logic. The integrated circuit also includes a monitoring logic structure operative to detect at least one type of operation executed for the test program from at least one particular control signal activated by the LBIST controller for controlling the at least one selection of core logic to execute the test program from among at least one control signal for controlling operations on the at least one selection of core logic.

Abstract: Provided is a method for the collection and storage of information related to the operation of a chip module. The disclosed technology provides a chip data collection and storage controller. In one embodiment, a chip module is provided with a stand-alone memory that records information relevant to potential debugging operations. The stand-alone memory is on the same chip module as the chip die but is not part of the chip die. A data bus is provided between the chip module and the memory. In addition, the memory has I/O access so that information can be accessed in the event that the chip module cannot be accessed. Stored information includes, but is not limited to, environmental conditions, performance information, errors, time usage, run time, number of power on cycles, the highest temperature experience by the chip, wafer and x, y data, manufacturing info, FIR errors, and PRSO, SRAM PSRO values.

Abstract: The present invention provides systems and methods for enabling a customer to sample content and select content for purchasing while the customer is in a retail store. Advantageously, the customer may be given one or more options for the delivery of the content.

Abstract: In one aspect, the invention provides a device for facilitating the acquisition of media assets. In some embodiments, the device includes: a housing; a USB connector projecting outwardly from an end of the housing; a card reader housed in the housing; non-volatile memory housed in the housing and coupled to the USB connector and the card reader; and a barcode disposed on a major surface of the housing, said barcode encoding an identifier that is associated with customer information.

Abstract: A system for tracking a billing cycle in a billing system includes a data tracking engine and a rule-based engine. The rule-based engine retrieves information from the billing system during the billing cycle based on a set of rules, and provides the data to the data tracking engine. The data tracking engine generates status information and reports based on the data. The status information and reports can be accessed via a web client to monitor the billing cycle. Additionally, the rule-based engine identifies events in the billing cycle and generates a notification to alert a person if the event is not successfully completed according to a billing schedule. The notification can be accessed via a web client or a wireless communications device. The rule-based engine can subsequently issue an escalated notification to alert another user if the event has not successfully completed at a later time.

Abstract: The present invention provides systems and methods for enabling a customer to sample content and select content for purchasing while the customer is in a retail store. Advantageously, the customer may be given one or more options for the delivery of the content.